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1 /*
2 * (C) Copyright 2011 Freescale Semiconductor, Inc.
3 * Author: Fabio Estevam <fabio.estevam@freescale.com>
4 *
5 * Based on m28evk.h:
6 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
7 * on behalf of DENX Software Engineering GmbH
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19 #ifndef __CONFIG_H
20 #define __CONFIG_H
21
22 #include <asm/arch/regs-base.h>
23
24 /*
25 * SoC configurations
26 */
27 #define CONFIG_MX28 /* i.MX28 SoC */
28 #define CONFIG_MXS_GPIO /* GPIO control */
29 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
30
31 #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
32
33 #define CONFIG_SYS_NO_FLASH
34 #define CONFIG_SYS_ICACHE_OFF
35 #define CONFIG_SYS_DCACHE_OFF
36 #define CONFIG_BOARD_EARLY_INIT_F
37 #define CONFIG_ARCH_CPU_INIT
38 #define CONFIG_ARCH_MISC_INIT
39
40 /*
41 * SPL
42 */
43 #define CONFIG_SPL
44 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
45 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mx28"
46 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
47 #define CONFIG_SPL_LIBCOMMON_SUPPORT
48 #define CONFIG_SPL_LIBGENERIC_SUPPORT
49 #define CONFIG_SPL_GPIO_SUPPORT
50
51 /*
52 * U-Boot Commands
53 */
54 #include <config_cmd_default.h>
55 #define CONFIG_DISPLAY_CPUINFO
56 #define CONFIG_DOS_PARTITION
57 #define CONFIG_CMD_FAT
58
59 #define CONFIG_CMD_CACHE
60 #define CONFIG_CMD_DATE
61 #define CONFIG_CMD_DHCP
62 #define CONFIG_CMD_GPIO
63 #define CONFIG_CMD_MII
64 #define CONFIG_CMD_MMC
65 #define CONFIG_CMD_NET
66 #define CONFIG_CMD_NFS
67 #define CONFIG_CMD_PING
68 #define CONFIG_CMD_SF
69 #define CONFIG_CMD_SPI
70 #define CONFIG_CMD_USB
71 #define CONFIG_CMD_BOOTZ
72
73 /*
74 * Memory configurations
75 */
76 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
77 #define PHYS_SDRAM_1 0x40000000 /* Base address */
78 #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
79 #define CONFIG_STACKSIZE (128 * 1024) /* 128 KB stack */
80 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
81 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
82 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
83 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
84 /* Point initial SP in SRAM so SPL can use it too. */
85
86 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
87 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
88
89 #define CONFIG_SYS_INIT_SP_OFFSET \
90 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
91 #define CONFIG_SYS_INIT_SP_ADDR \
92 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
93
94 /*
95 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
96 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
97 * binary. In case there was more of this mess, 0x100 bytes are skipped.
98 */
99 #define CONFIG_SYS_TEXT_BASE 0x40000100
100
101 #define CONFIG_ENV_OVERWRITE
102 /*
103 * U-Boot general configurations
104 */
105 #define CONFIG_SYS_LONGHELP
106 #define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
107 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
108 #define CONFIG_SYS_PBSIZE \
109 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
110 /* Print buffer size */
111 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
112 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
113 /* Boot argument buffer size */
114 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
115 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
116 #define CONFIG_CMDLINE_EDITING /* Command history etc */
117 #define CONFIG_SYS_HUSH_PARSER
118 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
119
120 /*
121 * Serial Driver
122 */
123 #define CONFIG_PL011_SERIAL
124 #define CONFIG_PL011_CLOCK 24000000
125 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
126 #define CONFIG_CONS_INDEX 0
127 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
128
129 /*
130 * DMA
131 */
132 #define CONFIG_APBH_DMA
133
134 /*
135 * MMC Driver
136 */
137 #define CONFIG_ENV_IS_IN_MMC
138 #ifdef CONFIG_ENV_IS_IN_MMC
139 #define CONFIG_ENV_OFFSET (256 * 1024)
140 #define CONFIG_ENV_SIZE (16 * 1024)
141 #define CONFIG_SYS_MMC_ENV_DEV 0
142 #endif
143 #define CONFIG_CMD_SAVEENV
144 #ifdef CONFIG_CMD_MMC
145 #define CONFIG_MMC
146 #define CONFIG_GENERIC_MMC
147 #define CONFIG_MMC_BOUNCE_BUFFER
148 #define CONFIG_MXS_MMC
149 #endif
150
151 /*
152 * NAND Driver
153 */
154 #ifdef CONFIG_CMD_NAND
155 #define CONFIG_NAND_MXS
156 #define CONFIG_SYS_MAX_NAND_DEVICE 1
157 #define CONFIG_SYS_NAND_BASE 0x60000000
158 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
159 #endif
160
161 /*
162 * Ethernet on SOC (FEC)
163 */
164 #ifdef CONFIG_CMD_NET
165 #define CONFIG_NET_MULTI
166 #define CONFIG_ETHPRIME "FEC0"
167 #define CONFIG_FEC_MXC
168 #define CONFIG_FEC_MXC_MULTI
169 #define CONFIG_MII
170 #define CONFIG_DISCOVER_PHY
171 #define CONFIG_FEC_XCV_TYPE RMII
172 #define CONFIG_MX28_FEC_MAC_IN_OCOTP
173 #endif
174
175 /*
176 * RTC
177 */
178 #ifdef CONFIG_CMD_DATE
179 #define CONFIG_RTC_MXS
180 #endif
181
182 /*
183 * USB
184 */
185 #ifdef CONFIG_CMD_USB
186 #define CONFIG_USB_EHCI
187 #define CONFIG_USB_EHCI_MXS
188 #define CONFIG_EHCI_MXS_PORT 1
189 #define CONFIG_EHCI_IS_TDI
190 #define CONFIG_USB_STORAGE
191 #endif
192
193 /*
194 * SPI
195 */
196 #ifdef CONFIG_CMD_SPI
197 #define CONFIG_HARD_SPI
198 #define CONFIG_MXS_SPI
199 #define CONFIG_SPI_HALF_DUPLEX
200 #define CONFIG_DEFAULT_SPI_BUS 2
201 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
202
203 /* SPI Flash */
204 #ifdef CONFIG_CMD_SF
205 #define CONFIG_SPI_FLASH
206 #define CONFIG_SF_DEFAULT_BUS 2
207 #define CONFIG_SF_DEFAULT_CS 0
208 /* this may vary and depends on the installed chip */
209 #define CONFIG_SPI_FLASH_SST
210 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
211 #define CONFIG_SF_DEFAULT_SPEED 24000000
212
213 /* (redundant) environemnt in SPI flash */
214 #undef CONFIG_ENV_IS_IN_SPI_FLASH
215 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
216 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
217 #define CONFIG_ENV_SIZE 0x1000 /* 4KB */
218 #define CONFIG_ENV_OFFSET 0x40000 /* 256K */
219 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
220 #define CONFIG_ENV_SECT_SIZE 0x1000
221 #define CONFIG_ENV_SPI_CS 0
222 #define CONFIG_ENV_SPI_BUS 2
223 #define CONFIG_ENV_SPI_MAX_HZ 24000000
224 #define CONFIG_ENV_SPI_MODE SPI_MODE_0
225 #endif
226 #endif
227 #endif
228
229 /*
230 * Boot Linux
231 */
232 #define CONFIG_CMDLINE_TAG
233 #define CONFIG_SETUP_MEMORY_TAGS
234 #define CONFIG_BOOTDELAY 3
235 #define CONFIG_BOOTFILE "uImage"
236 #define CONFIG_BOOTCOMMAND "run bootcmd_net"
237 #define CONFIG_LOADADDR 0x42000000
238 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
239 #define CONFIG_OF_LIBFDT
240
241 /*
242 * Extra Environments
243 */
244 #define CONFIG_EXTRA_ENV_SETTINGS \
245 "console_fsl=console=ttyAM0" \
246 "console_mainline=console=ttyAMA0" \
247 "netargs=setenv bootargs console=${console_mainline}" \
248 "root=/dev/nfs " \
249 "ip=dhcp nfsroot=${serverip}:${nfsroot}\0" \
250 "bootcmd_net=echo Booting from net ...; " \
251 "run netargs; " \
252 "dhcp ${uimage}; bootm\0" \
253
254 #endif /* __CONFIG_H */