include/configs/mx31pdk.h

   1 /*
   2  * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
   3  *
   4  * (C) Copyright 2004
   5  * Texas Instruments.
   6  * Richard Woodruff <r-woodruff2@ti.com>
   7  * Kshitij Gupta <kshitij@ti.com>
   8  *
   9  * Configuration settings for the Freescale i.MX31 PDK board.
  10  *
  11  * See file CREDITS for list of people who contributed to this
  12  * project.
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License as
  16  * published by the Free Software Foundation; either version 2 of
  17  * the License, or (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27  * MA 02111-1307 USA
  28  */
  29
  30 #ifndef __CONFIG_H
  31 #define __CONFIG_H
  32
  33 /* High Level Configuration Options */
  34 #define CONFIG_ARM1136          1       /* This is an arm1136 CPU core */
  35 #define CONFIG_MX31             1       /* in a mx31 */
  36 #define CONFIG_MX31_HCLK_FREQ   26000000
  37 #define CONFIG_MX31_CLK32       32768
  38
  39 #define CONFIG_DISPLAY_CPUINFO
  40 #define CONFIG_DISPLAY_BOARDINFO
  41
  42 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  43 #define CONFIG_SETUP_MEMORY_TAGS        1
  44 #define CONFIG_INITRD_TAG               1
  45
  46 #if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
  47 #define CONFIG_SKIP_LOWLEVEL_INIT
  48 #define CONFIG_SKIP_RELOCATE_UBOOT
  49 #endif
  50
  51 /*
  52  * Size of malloc() pool
  53  */
  54 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128 * 1024)
  55 /* Bytes reserved for initial data */
  56 #define CONFIG_SYS_GBL_DATA_SIZE        128
  57
  58 /*
  59  * Hardware drivers
  60  */
  61
  62 #define CONFIG_MXC_UART         1
  63 #define CONFIG_SYS_MX31_UART1   1
  64
  65 #define CONFIG_HARD_SPI         1
  66 #define CONFIG_MXC_SPI          1
  67 #define CONFIG_DEFAULT_SPI_BUS  1
  68 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
  69
  70 #define CONFIG_RTC_MC13783      1
  71
  72 /* MC13783 connected to CSPI2 and SS2 */
  73 #define CONFIG_MC13783_SPI_BUS  1
  74 #define CONFIG_MC13783_SPI_CS   2
  75
  76 /* allow to overwrite serial and ethaddr */
  77 #define CONFIG_ENV_OVERWRITE
  78 #define CONFIG_CONS_INDEX               1
  79 #define CONFIG_BAUDRATE                 115200
  80 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
  81
  82 /***********************************************************
  83  * Command definition
  84  ***********************************************************/
  85
  86 #include <config_cmd_default.h>
  87
  88 #define CONFIG_CMD_MII
  89 #define CONFIG_CMD_PING
  90 #define CONFIG_CMD_SPI
  91 #define CONFIG_CMD_DATE
  92
  93 /*
  94  * Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require
  95  * that CFG_NO_FLASH is undefined).
  96  */
  97 #undef CONFIG_CMD_IMLS
  98
  99 #define CONFIG_BOOTDELAY        3
 100
 101 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 102         "bootargs_base=setenv bootargs console=ttymxc0,115200\0"        \
 103         "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs "       \
 104                 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"     \
 105         "bootcmd=run bootcmd_net\0"                                     \
 106         "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; "     \
 107                 "tftpboot 0x81000000 uImage-mx31; bootm\0"
 108
 109 #define CONFIG_DRIVER_SMC911X           1
 110 #define CONFIG_DRIVER_SMC911X_BASE      0xB6000000
 111 #define CONFIG_DRIVER_SMC911X_32_BIT    1
 112
 113 /*
 114  * Miscellaneous configurable options
 115  */
 116 #define CONFIG_SYS_LONGHELP     /* undef to save memory */
 117 #define CONFIG_SYS_PROMPT       "uboot> "
 118 #define CONFIG_SYS_CBSIZE       256     /* Console I/O Buffer Size */
 119 /* Print Buffer Size */
 120 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE + \
 121                                 sizeof(CONFIG_SYS_PROMPT)+16)
 122 /* max number of command args */
 123 #define CONFIG_SYS_MAXARGS      16
 124 /* Boot Argument Buffer Size */
 125 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
 126
 127 /* memtest works on */
 128 #define CONFIG_SYS_MEMTEST_START        0x80000000
 129 #define CONFIG_SYS_MEMTEST_END          0x10000
 130
 131 /* default load address */
 132 #define CONFIG_SYS_LOAD_ADDR            0x81000000
 133
 134 #define CONFIG_SYS_HZ                   1000
 135
 136 #define CONFIG_CMDLINE_EDITING  1
 137
 138 /*-----------------------------------------------------------------------
 139  * Stack sizes
 140  *
 141  * The stack sizes are set up in start.S using the settings below
 142  */
 143 #define CONFIG_STACKSIZE        (128 * 1024) /* regular stack */
 144
 145 /*-----------------------------------------------------------------------
 146  * Physical Memory Map
 147  */
 148 #define CONFIG_NR_DRAM_BANKS    1
 149 #define PHYS_SDRAM_1            CSD0_BASE
 150 #define PHYS_SDRAM_1_SIZE       (128 * 1024 * 1024)
 151
 152 /*-----------------------------------------------------------------------
 153  * FLASH and environment organization
 154  */
 155 /* No NOR flash present */
 156 #define CONFIG_SYS_NO_FLASH     1
 157
 158 #define CONFIG_ENV_IS_NOWHERE   1
 159
 160 #define CONFIG_ENV_SIZE         (128 * 1024)
 161
 162 /* NAND configuration for the NAND_SPL */
 163
 164 /* Start copying real U-boot from the second page */
 165 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x800
 166 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x30000
 167 /* Load U-Boot to this address */
 168 #define CONFIG_SYS_NAND_U_BOOT_DST      0x87f00000
 169 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_NAND_U_BOOT_DST
 170
 171 #define CONFIG_SYS_NAND_PAGE_SIZE       0x800
 172 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 173 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 174 #define CONFIG_SYS_NAND_SIZE            (256 * 1024 * 1024)
 175 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 176
 177
 178 /* Configuration of lowlevel_init.S (clocks and SDRAM) */
 179 #define CCM_CCMR_SETUP          0x074B0BF5
 180 #define CCM_PDR0_SETUP_532MHZ   (PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | \
 181                                  PDR0_HSP_PODF(3) | PDR0_NFC_PODF(5) |     \
 182                                  PDR0_IPG_PODF(1) | PDR0_MAX_PODF(3) |     \
 183                                  PDR0_MCU_PODF(0))
 184 #define CCM_MPCTL_SETUP_532MHZ  (PLL_PD(0) | PLL_MFD(51) | PLL_MFI(10) |   \
 185                                  PLL_MFN(12))
 186
 187 #define ESDMISC_MDDR_SETUP      0x00000004
 188 #define ESDMISC_MDDR_RESET_DL   0x0000000c
 189 #define ESDCFG0_MDDR_SETUP      0x006ac73a
 190
 191 #define ESDCTL_ROW_COL          (ESDCTL_SDE | ESDCTL_ROW(2) | ESDCTL_COL(2))
 192 #define ESDCTL_SETTINGS         (ESDCTL_ROW_COL | ESDCTL_SREFR(3) | \
 193                                  ESDCTL_DSIZ(2) | ESDCTL_BL(1))
 194 #define ESDCTL_PRECHARGE        (ESDCTL_ROW_COL | ESDCTL_CMD_PRECHARGE)
 195 #define ESDCTL_AUTOREFRESH      (ESDCTL_ROW_COL | ESDCTL_CMD_AUTOREFRESH)
 196 #define ESDCTL_LOADMODEREG      (ESDCTL_ROW_COL | ESDCTL_CMD_LOADMODEREG)
 197 #define ESDCTL_RW               ESDCTL_SETTINGS
 198
 199 #endif /* __CONFIG_H */