include/configs/mx51_efikamx.h

   1 /*
   2  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
   3  *
   4  * (C) Copyright 2009 Freescale Semiconductor, Inc.
   5  *
   6  * Configuration settings for the MX51EVK Board
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 /*
  15  * High Level Board Configuration Options
  16  */
  17 /* An i.MX51 CPU */
  18 #define CONFIG_MX51
  19
  20 #define machine_is_efikamx()    (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
  21 #define machine_is_efikasb()    (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
  22
  23 #include <asm/arch/imx-regs.h>
  24
  25 #define CONFIG_DISPLAY_CPUINFO
  26 #define CONFIG_DISPLAY_BOARDINFO
  27
  28 #define CONFIG_SYS_TEXT_BASE            0x97800000
  29
  30 #define CONFIG_SYS_ICACHE_OFF
  31 #define CONFIG_SYS_DCACHE_OFF
  32
  33 /*
  34  * Bootloader Components Configuration
  35  */
  36 #define CONFIG_CMD_SPI
  37 #define CONFIG_CMD_SF
  38 #define CONFIG_CMD_MMC
  39 #define CONFIG_CMD_FAT
  40 #define CONFIG_CMD_EXT2
  41 #define CONFIG_CMD_IDE
  42 #define CONFIG_CMD_DATE
  43
  44 /*
  45  * Environmental settings
  46  */
  47
  48 #define CONFIG_ENV_OFFSET               (6 * 64 * 1024)
  49 #define CONFIG_ENV_SECT_SIZE            (1 * 64 * 1024)
  50 #define CONFIG_ENV_SIZE                 (4 * 1024)
  51
  52 /*
  53  * ATAG setup
  54  */
  55 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  56 #define CONFIG_REVISION_TAG
  57 #define CONFIG_SETUP_MEMORY_TAGS
  58 #define CONFIG_INITRD_TAG
  59
  60 #define CONFIG_OF_LIBFDT                1
  61
  62 /*
  63  * Size of malloc() pool
  64  */
  65 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  66
  67 #define CONFIG_BOARD_EARLY_INIT_F
  68 #define CONFIG_BOARD_LATE_INIT
  69
  70 /*
  71  * Hardware drivers
  72  */
  73 #define CONFIG_MXC_UART
  74 #define CONFIG_MXC_UART_BASE            UART1_BASE
  75 #define CONFIG_CONS_INDEX               1
  76 #define CONFIG_BAUDRATE                 115200
  77
  78 #define CONFIG_MXC_GPIO
  79
  80 /*
  81  * SPI Interface
  82  */
  83 #ifdef CONFIG_CMD_SPI
  84
  85 #define CONFIG_HARD_SPI
  86 #define CONFIG_MXC_SPI
  87 #define CONFIG_DEFAULT_SPI_BUS          1
  88 #define CONFIG_DEFAULT_SPI_MODE         (SPI_MODE_0 | SPI_CS_HIGH)
  89
  90 /* SPI FLASH */
  91 #ifdef CONFIG_CMD_SF
  92
  93 #define CONFIG_SPI_FLASH_SST
  94 #define CONFIG_SF_DEFAULT_CS            1
  95 #define CONFIG_SF_DEFAULT_MODE          (SPI_MODE_0)
  96 #define CONFIG_SF_DEFAULT_SPEED         25000000
  97
  98 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
  99 #define CONFIG_ENV_SPI_BUS              0
 100 #define CONFIG_ENV_SPI_MAX_HZ           25000000
 101 #define CONFIG_ENV_SPI_MODE             (SPI_MODE_0)
 102 #define CONFIG_FSL_ENV_IN_SF
 103 #define CONFIG_ENV_IS_IN_SPI_FLASH
 104 #define CONFIG_SYS_NO_FLASH
 105
 106 #else
 107 #define CONFIG_ENV_IS_NOWHERE
 108 #endif
 109
 110 /* SPI PMIC */
 111 #define CONFIG_POWER
 112 #define CONFIG_POWER_SPI
 113 #define CONFIG_POWER_FSL
 114 #define CONFIG_FSL_PMIC_BUS             0
 115 #define CONFIG_FSL_PMIC_CS              (0 | 120 << 8)
 116 #define CONFIG_FSL_PMIC_CLK             25000000
 117 #define CONFIG_FSL_PMIC_MODE            (SPI_MODE_0 | SPI_CS_HIGH)
 118 #define CONFIG_FSL_PMIC_BITLEN  32
 119 #define CONFIG_RTC_MC13XXX
 120 #endif
 121
 122 /*
 123  * MMC Configs
 124  */
 125 #ifdef CONFIG_CMD_MMC
 126 #define CONFIG_MMC
 127 #define CONFIG_GENERIC_MMC
 128 #define CONFIG_FSL_ESDHC
 129 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 130 #define CONFIG_SYS_FSL_ESDHC_NUM        2
 131 #endif
 132
 133 /*
 134  * ATA/IDE
 135  */
 136 #ifdef CONFIG_CMD_IDE
 137 #define CONFIG_LBA48
 138 #undef CONFIG_IDE_LED
 139 #undef CONFIG_IDE_RESET
 140
 141 #define CONFIG_MX51_PATA
 142
 143 #define __io
 144
 145 #define CONFIG_SYS_IDE_MAXBUS           1
 146 #define CONFIG_SYS_IDE_MAXDEVICE        1
 147
 148 #define CONFIG_SYS_ATA_BASE_ADDR        0x83fe0000
 149 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0
 150
 151 #define CONFIG_SYS_ATA_DATA_OFFSET      0xa0
 152 #define CONFIG_SYS_ATA_REG_OFFSET       0xa0
 153 #define CONFIG_SYS_ATA_ALT_OFFSET       0xd8
 154
 155 #define CONFIG_SYS_ATA_STRIDE           4
 156
 157 #define CONFIG_IDE_PREINIT
 158 #define CONFIG_MXC_ATA_PIO_MODE         4
 159 #endif
 160
 161 /*
 162  * USB
 163  */
 164 #define CONFIG_CMD_USB
 165 #ifdef  CONFIG_CMD_USB
 166 #define CONFIG_USB_EHCI                 /* Enable EHCI USB support */
 167 #define CONFIG_USB_EHCI_MX5
 168 #define CONFIG_USB_ULPI
 169 #define CONFIG_USB_ULPI_VIEWPORT
 170 #define CONFIG_MXC_USB_PORT     1
 171 #if     (CONFIG_MXC_USB_PORT == 0)
 172 #define CONFIG_MXC_USB_PORTSC   (1 << 28)
 173 #define CONFIG_MXC_USB_FLAGS    MXC_EHCI_INTERNAL_PHY
 174 #else
 175 #define CONFIG_MXC_USB_PORTSC   (2 << 30)
 176 #define CONFIG_MXC_USB_FLAGS    0
 177 #endif
 178 #define CONFIG_EHCI_IS_TDI
 179 #define CONFIG_USB_STORAGE
 180 #define CONFIG_USB_HOST_ETHER
 181 #define CONFIG_USB_KEYBOARD
 182 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
 183 #define CONFIG_PREBOOT
 184 /* USB NET */
 185 #ifdef  CONFIG_CMD_NET
 186 #define CONFIG_USB_ETHER_ASIX
 187 #define CONFIG_CMD_PING
 188 #define CONFIG_CMD_DHCP
 189 #endif
 190 #endif /* CONFIG_CMD_USB */
 191
 192 /*
 193  * Filesystems
 194  */
 195 #ifdef CONFIG_CMD_FAT
 196 #define CONFIG_DOS_PARTITION
 197 #endif
 198
 199 /*
 200  * Miscellaneous configurable options
 201  */
 202 #define CONFIG_ENV_OVERWRITE
 203 #define CONFIG_BOOTDELAY                3
 204 #define CONFIG_LOADADDR                 0x90800000
 205
 206 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 207 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 208 #define CONFIG_AUTO_COMPLETE
 209 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 210 /* Print Buffer Size */
 211 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 212 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 213 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
 214
 215 #define CONFIG_SYS_MEMTEST_START        0x90000000
 216 #define CONFIG_SYS_MEMTEST_END          0x90010000
 217
 218 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 219
 220 #define CONFIG_CMDLINE_EDITING
 221
 222 /*-----------------------------------------------------------------------
 223  * Physical Memory Map
 224  */
 225 #define CONFIG_NR_DRAM_BANKS            1
 226 #define PHYS_SDRAM_1                    CSD0_BASE_ADDR
 227 #define PHYS_SDRAM_1_SIZE               (512 * 1024 * 1024)
 228
 229 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
 230 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
 231 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
 232
 233 #define CONFIG_SYS_INIT_SP_OFFSET \
 234         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 235 #define CONFIG_SYS_INIT_SP_ADDR \
 236         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 237
 238 #define CONFIG_SYS_DDR_CLKSEL           0
 239 #define CONFIG_SYS_CLKTL_CBCDR          0x59E35145
 240 #define CONFIG_SYS_MAIN_PWR_ON
 241
 242 #endif