include/configs/mx51_efikamx.h

   1 /*
   2  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
   3  *
   4  * (C) Copyright 2009 Freescale Semiconductor, Inc.
   5  *
   6  * Configuration settings for the MX51EVK Board
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 #include <config_cmd_default.h>
  15
  16 /*
  17  * High Level Board Configuration Options
  18  */
  19 /* An i.MX51 CPU */
  20 #define CONFIG_MX51
  21
  22 #define machine_is_efikamx()    (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
  23 #define machine_is_efikasb()    (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
  24
  25 #include <asm/arch/imx-regs.h>
  26
  27 #define CONFIG_DISPLAY_CPUINFO
  28 #define CONFIG_DISPLAY_BOARDINFO
  29
  30 #define CONFIG_SYS_TEXT_BASE            0x97800000
  31
  32 #define CONFIG_SYS_ICACHE_OFF
  33 #define CONFIG_SYS_DCACHE_OFF
  34
  35 /*
  36  * Bootloader Components Configuration
  37  */
  38 #define CONFIG_CMD_SPI
  39 #define CONFIG_CMD_SF
  40 #define CONFIG_CMD_MMC
  41 #define CONFIG_CMD_FAT
  42 #define CONFIG_CMD_EXT2
  43 #define CONFIG_CMD_IDE
  44 #define CONFIG_CMD_DATE
  45 #undef CONFIG_CMD_IMLS
  46
  47 /*
  48  * Environmental settings
  49  */
  50
  51 #define CONFIG_ENV_OFFSET               (6 * 64 * 1024)
  52 #define CONFIG_ENV_SECT_SIZE            (1 * 64 * 1024)
  53 #define CONFIG_ENV_SIZE                 (4 * 1024)
  54
  55 /*
  56  * ATAG setup
  57  */
  58 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  59 #define CONFIG_REVISION_TAG
  60 #define CONFIG_SETUP_MEMORY_TAGS
  61 #define CONFIG_INITRD_TAG
  62
  63 #define CONFIG_OF_LIBFDT                1
  64
  65 /*
  66  * Size of malloc() pool
  67  */
  68 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  69
  70 #define CONFIG_BOARD_EARLY_INIT_F
  71 #define CONFIG_BOARD_LATE_INIT
  72
  73 /*
  74  * Hardware drivers
  75  */
  76 #define CONFIG_MXC_UART
  77 #define CONFIG_MXC_UART_BASE            UART1_BASE
  78 #define CONFIG_CONS_INDEX               1
  79 #define CONFIG_BAUDRATE                 115200
  80
  81 #define CONFIG_MXC_GPIO
  82
  83 /*
  84  * SPI Interface
  85  */
  86 #ifdef CONFIG_CMD_SPI
  87
  88 #define CONFIG_HARD_SPI
  89 #define CONFIG_MXC_SPI
  90 #define CONFIG_DEFAULT_SPI_BUS          1
  91 #define CONFIG_DEFAULT_SPI_MODE         (SPI_MODE_0 | SPI_CS_HIGH)
  92
  93 /* SPI FLASH */
  94 #ifdef CONFIG_CMD_SF
  95
  96 #define CONFIG_SPI_FLASH_SST
  97 #define CONFIG_SF_DEFAULT_CS            1
  98 #define CONFIG_SF_DEFAULT_MODE          (SPI_MODE_0)
  99 #define CONFIG_SF_DEFAULT_SPEED         25000000
 100
 101 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
 102 #define CONFIG_ENV_SPI_BUS              0
 103 #define CONFIG_ENV_SPI_MAX_HZ           25000000
 104 #define CONFIG_ENV_SPI_MODE             (SPI_MODE_0)
 105 #define CONFIG_FSL_ENV_IN_SF
 106 #define CONFIG_ENV_IS_IN_SPI_FLASH
 107 #define CONFIG_SYS_NO_FLASH
 108
 109 #else
 110 #define CONFIG_ENV_IS_NOWHERE
 111 #endif
 112
 113 /* SPI PMIC */
 114 #define CONFIG_POWER
 115 #define CONFIG_POWER_SPI
 116 #define CONFIG_POWER_FSL
 117 #define CONFIG_FSL_PMIC_BUS             0
 118 #define CONFIG_FSL_PMIC_CS              (0 | 120 << 8)
 119 #define CONFIG_FSL_PMIC_CLK             25000000
 120 #define CONFIG_FSL_PMIC_MODE            (SPI_MODE_0 | SPI_CS_HIGH)
 121 #define CONFIG_FSL_PMIC_BITLEN  32
 122 #define CONFIG_RTC_MC13XXX
 123 #endif
 124
 125 /*
 126  * MMC Configs
 127  */
 128 #ifdef CONFIG_CMD_MMC
 129 #define CONFIG_MMC
 130 #define CONFIG_GENERIC_MMC
 131 #define CONFIG_FSL_ESDHC
 132 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 133 #define CONFIG_SYS_FSL_ESDHC_NUM        2
 134 #endif
 135
 136 /*
 137  * ATA/IDE
 138  */
 139 #ifdef CONFIG_CMD_IDE
 140 #define CONFIG_LBA48
 141 #undef CONFIG_IDE_LED
 142 #undef CONFIG_IDE_RESET
 143
 144 #define CONFIG_MX51_PATA
 145
 146 #define __io
 147
 148 #define CONFIG_SYS_IDE_MAXBUS           1
 149 #define CONFIG_SYS_IDE_MAXDEVICE        1
 150
 151 #define CONFIG_SYS_ATA_BASE_ADDR        0x83fe0000
 152 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0
 153
 154 #define CONFIG_SYS_ATA_DATA_OFFSET      0xa0
 155 #define CONFIG_SYS_ATA_REG_OFFSET       0xa0
 156 #define CONFIG_SYS_ATA_ALT_OFFSET       0xd8
 157
 158 #define CONFIG_SYS_ATA_STRIDE           4
 159
 160 #define CONFIG_IDE_PREINIT
 161 #define CONFIG_MXC_ATA_PIO_MODE         4
 162 #endif
 163
 164 /*
 165  * USB
 166  */
 167 #define CONFIG_CMD_USB
 168 #ifdef  CONFIG_CMD_USB
 169 #define CONFIG_USB_EHCI                 /* Enable EHCI USB support */
 170 #define CONFIG_USB_EHCI_MX5
 171 #define CONFIG_USB_ULPI
 172 #define CONFIG_USB_ULPI_VIEWPORT
 173 #define CONFIG_MXC_USB_PORT     1
 174 #if     (CONFIG_MXC_USB_PORT == 0)
 175 #define CONFIG_MXC_USB_PORTSC   (1 << 28)
 176 #define CONFIG_MXC_USB_FLAGS    MXC_EHCI_INTERNAL_PHY
 177 #else
 178 #define CONFIG_MXC_USB_PORTSC   (2 << 30)
 179 #define CONFIG_MXC_USB_FLAGS    0
 180 #endif
 181 #define CONFIG_EHCI_IS_TDI
 182 #define CONFIG_USB_STORAGE
 183 #define CONFIG_USB_HOST_ETHER
 184 #define CONFIG_USB_KEYBOARD
 185 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
 186 #define CONFIG_PREBOOT
 187 /* USB NET */
 188 #ifdef  CONFIG_CMD_NET
 189 #define CONFIG_USB_ETHER_ASIX
 190 #define CONFIG_CMD_PING
 191 #define CONFIG_CMD_DHCP
 192 #endif
 193 #endif /* CONFIG_CMD_USB */
 194
 195 /*
 196  * Filesystems
 197  */
 198 #ifdef CONFIG_CMD_FAT
 199 #define CONFIG_DOS_PARTITION
 200 #ifdef  CONFIG_CMD_NET
 201 #define CONFIG_CMD_NFS
 202 #endif
 203 #endif
 204
 205 /*
 206  * Miscellaneous configurable options
 207  */
 208 #define CONFIG_ENV_OVERWRITE
 209 #define CONFIG_BOOTDELAY                3
 210 #define CONFIG_LOADADDR                 0x90800000
 211
 212 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 213 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 214 #define CONFIG_SYS_PROMPT               "Efika> "
 215 #define CONFIG_AUTO_COMPLETE
 216 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 217 /* Print Buffer Size */
 218 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 219 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 220 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
 221
 222 #define CONFIG_SYS_MEMTEST_START        0x90000000
 223 #define CONFIG_SYS_MEMTEST_END          0x90010000
 224
 225 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 226
 227 #define CONFIG_CMDLINE_EDITING
 228
 229 /*-----------------------------------------------------------------------
 230  * Physical Memory Map
 231  */
 232 #define CONFIG_NR_DRAM_BANKS            1
 233 #define PHYS_SDRAM_1                    CSD0_BASE_ADDR
 234 #define PHYS_SDRAM_1_SIZE               (512 * 1024 * 1024)
 235
 236 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
 237 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
 238 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
 239
 240 #define CONFIG_SYS_INIT_SP_OFFSET \
 241         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 242 #define CONFIG_SYS_INIT_SP_ADDR \
 243         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 244
 245 #define CONFIG_SYS_DDR_CLKSEL           0
 246 #define CONFIG_SYS_CLKTL_CBCDR          0x59E35145
 247 #define CONFIG_SYS_MAIN_PWR_ON
 248
 249 #endif