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1 /*
2 * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
3 * Patrick Bruenn <p.bruenn@beckhoff.com>
4 *
5 * Configuration settings for Beckhoff CX9020.
6 *
7 * Based on Freescale's Linux i.MX mx53loco.h file:
8 * Copyright (C) 2010-2011 Freescale Semiconductor.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 #include <asm/arch/imx-regs.h>
17
18 #define CONFIG_CMDLINE_TAG
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21
22 #define CONFIG_SYS_FSL_CLK
23
24 /* Size of malloc() pool */
25 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
26
27 #define CONFIG_MXC_GPIO
28 #define CONFIG_REVISION_TAG
29
30 #define CONFIG_MXC_UART_BASE UART2_BASE
31
32 #define CONFIG_FPGA_COUNT 1
33
34 /* MMC Configs */
35 #define CONFIG_FSL_ESDHC
36 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
37 #define CONFIG_SYS_FSL_ESDHC_NUM 2
38
39 /* bootz: zImage/initrd.img support */
40
41 /* Eth Configs */
42 #define CONFIG_MII
43 #define IMX_FEC_BASE FEC_BASE_ADDR
44 #define CONFIG_ETHPRIME "FEC0"
45 #define CONFIG_FEC_MXC_PHYADDR 0x1F
46
47 /* USB Configs */
48 #define CONFIG_USB_EHCI_MX5
49 #define CONFIG_MXC_USB_PORT 1
50 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
51 #define CONFIG_MXC_USB_FLAGS 0
52
53 /* allow to overwrite serial and ethaddr */
54 #define CONFIG_ENV_OVERWRITE
55 #define CONFIG_CONS_INDEX 1
56
57 /* Command definition */
58 #define CONFIG_SUPPORT_RAW_INITRD
59
60 #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */
61 #define CONFIG_SYS_TEXT_BASE 0x77800000
62
63 #define CONFIG_EXTRA_ENV_SETTINGS \
64 "fdt_addr_r=0x71ff0000\0" \
65 "pxefile_addr_r=0x73000000\0" \
66 "ramdisk_addr_r=0x72000000\0" \
67 "console=ttymxc1,115200\0" \
68 "uenv=/boot/uEnv.txt\0" \
69 "optargs=\0" \
70 "cmdline=\0" \
71 "mmcdev=0\0" \
72 "mmcpart=1\0" \
73 "mmcrootfstype=ext4 rootwait fixrtc\0" \
74 "mmcargs=setenv bootargs console=${console} " \
75 "${optargs} " \
76 "root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \
77 "rootfstype=${mmcrootfstype} " \
78 "${cmdline}\0" \
79 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
80 "loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \
81 "loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \
82 "setenv rdsize ${filesize}\0" \
83 "loadfdt=echo loading ${fdt_path} ...;" \
84 "load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \
85 "mmcboot=mmc dev ${mmcdev}; " \
86 "if mmc rescan; then " \
87 "echo SD/MMC found on device ${mmcdev};" \
88 "echo Checking for: ${uenv} ...;" \
89 "setenv bootpart ${mmcdev}:${mmcpart};" \
90 "if test -e mmc ${bootpart} ${uenv}; then " \
91 "load mmc ${bootpart} ${loadaddr} ${uenv};" \
92 "env import -t ${loadaddr} ${filesize};" \
93 "echo Loaded environment from ${uenv};" \
94 "if test -n ${dtb}; then " \
95 "setenv fdt_file ${dtb};" \
96 "echo Using: dtb=${fdt_file} ...;" \
97 "fi;" \
98 "echo Checking for uname_r in ${uenv}...;" \
99 "if test -n ${uname_r}; then " \
100 "echo Running uname_boot ...;" \
101 "run uname_boot;" \
102 "fi;" \
103 "fi;" \
104 "fi;\0" \
105 "uname_boot="\
106 "setenv bootdir /boot; " \
107 "setenv bootfile vmlinuz-${uname_r}; " \
108 "setenv ccatfile /boot/ccat.rbf; " \
109 "echo loading CCAT firmware from ${ccatfile}; " \
110 "load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \
111 "fpga load 0 ${loadaddr} ${filesize}; " \
112 "if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \
113 "echo loading ${bootdir}/${bootfile} ...; " \
114 "run loadimage;" \
115 "setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \
116 "if test -e mmc ${bootpart} ${fdt_path}; then " \
117 "run loadfdt;" \
118 "else " \
119 "echo; echo unable to find ${fdt_file} ...;" \
120 "echo booting legacy ...;"\
121 "run mmcargs;" \
122 "echo debug: [${bootargs}] ... ;" \
123 "echo debug: [bootz ${loadaddr}] ... ;" \
124 "bootz ${loadaddr}; " \
125 "fi;" \
126 "run mmcargs;" \
127 "echo debug: [${bootargs}] ... ;" \
128 "echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \
129 "bootz ${loadaddr} - ${fdt_addr_r}; " \
130 "else " \
131 "echo loading from dhcp ...; " \
132 "run loadpxe; " \
133 "fi;\0"
134
135 #define CONFIG_BOOTCOMMAND \
136 "run mmcboot;"
137
138 #define CONFIG_ARP_TIMEOUT 200UL
139
140 /* Miscellaneous configurable options */
141 #define CONFIG_SYS_LONGHELP /* undef to save memory */
142 #define CONFIG_AUTO_COMPLETE
143 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
144
145 #define CONFIG_SYS_MEMTEST_START 0x70000000
146 #define CONFIG_SYS_MEMTEST_END 0x70010000
147
148 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
149
150 #define CONFIG_CMDLINE_EDITING
151
152 /* Physical Memory Map */
153 #define CONFIG_NR_DRAM_BANKS 2
154 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
155 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
156 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
157 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
158 #define PHYS_SDRAM_SIZE (gd->ram_size)
159
160 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
161 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
162 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
163
164 #define CONFIG_SYS_INIT_SP_OFFSET \
165 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
166 #define CONFIG_SYS_INIT_SP_ADDR \
167 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
168
169 /* environment organization */
170 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
171 #define CONFIG_ENV_SIZE (8 * 1024)
172 #define CONFIG_SYS_MMC_ENV_DEV 0
173
174 /* Framebuffer and LCD */
175 #define CONFIG_PREBOOT
176 #define CONFIG_VIDEO_IPUV3
177 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
178 #define CONFIG_VIDEO_BMP_RLE8
179 #define CONFIG_SPLASH_SCREEN
180 #define CONFIG_BMP_16BPP
181 #define CONFIG_VIDEO_LOGO
182
183 #endif /* __CONFIG_H */