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1 /*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 * Jason Liu <r64343@freescale.com>
4 *
5 * Configuration settings for Freescale MX53 low cost board.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #include <asm/arch/imx-regs.h>
14
15 #define CONSOLE_DEV "ttymxc0"
16
17 #define CONFIG_CMDLINE_TAG
18 #define CONFIG_SETUP_MEMORY_TAGS
19 #define CONFIG_INITRD_TAG
20
21 #define CONFIG_SYS_FSL_CLK
22
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
25
26 #define CONFIG_HW_WATCHDOG
27 #define CONFIG_IMX_WATCHDOG
28 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000
29
30 #define CONFIG_MISC_INIT_R
31 #define CONFIG_BOARD_LATE_INIT
32 #define CONFIG_REVISION_TAG
33
34 #define CONFIG_MXC_UART
35 #define CONFIG_MXC_UART_BASE UART1_BASE
36
37 /* MMC Configs */
38 #define CONFIG_FSL_ESDHC
39 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
40 #define CONFIG_SYS_FSL_ESDHC_NUM 2
41
42 /* Eth Configs */
43 #define CONFIG_MII
44
45 #define CONFIG_FEC_MXC
46 #define IMX_FEC_BASE FEC_BASE_ADDR
47 #define CONFIG_FEC_MXC_PHYADDR 0x1F
48
49 /* USB Configs */
50 #define CONFIG_USB_EHCI_MX5
51 #define CONFIG_USB_HOST_ETHER
52 #define CONFIG_USB_ETHER_ASIX
53 #define CONFIG_USB_ETHER_MCS7830
54 #define CONFIG_USB_ETHER_SMSC95XX
55 #define CONFIG_MXC_USB_PORT 1
56 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
57 #define CONFIG_MXC_USB_FLAGS 0
58
59 #define CONFIG_SYS_RTC_BUS_NUM 2
60 #define CONFIG_SYS_I2C_RTC_ADDR 0x30
61
62 /* I2C Configs */
63 #define CONFIG_SYS_I2C
64 #define CONFIG_SYS_I2C_MXC
65 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
66 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
67 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
68
69 /* PMIC Controller */
70 #define CONFIG_POWER
71 #define CONFIG_POWER_I2C
72 #define CONFIG_DIALOG_POWER
73 #define CONFIG_POWER_FSL
74 #define CONFIG_POWER_FSL_MC13892
75 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
76 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
77
78 /* allow to overwrite serial and ethaddr */
79 #define CONFIG_ENV_OVERWRITE
80 #define CONFIG_BAUDRATE 115200
81
82 /* Command definition */
83
84 #define CONFIG_ETHPRIME "FEC0"
85
86 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
87
88 #define PPD_CONFIG_NFS \
89 "nfsserver=192.168.252.95\0" \
90 "gatewayip=192.168.252.95\0" \
91 "netmask=255.255.255.0\0" \
92 "ipaddr=192.168.252.99\0" \
93 "kernsize=0x2000\0" \
94 "use_dhcp=0\0" \
95 "nfsroot=/opt/springdale/rd\0" \
96 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
97 "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \
98 "choose_ip=if test $use_dhcp = 1; then set kern_ipconf ip=dhcp; " \
99 "set getcmd dhcp; else set kern_ipconf " \
100 "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \
101 "set getcmd tftp; fi\0" \
102 "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \
103 "${nfsserver}:${image}; bootm ${loadaddr}\0" \
104
105 #define CONFIG_EXTRA_ENV_SETTINGS \
106 PPD_CONFIG_NFS \
107 "bootlimit=10\0" \
108 "image=/boot/fitImage\0" \
109 "fdt_high=0xffffffff\0" \
110 "dev=mmc\0" \
111 "devnum=0\0" \
112 "rootdev=mmcblk0p\0" \
113 "quiet=quiet loglevel=0\0" \
114 "console=" CONSOLE_DEV "\0" \
115 "lvds=ldb\0" \
116 "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
117 "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
118 "console=${console} ${rtc_status}\0" \
119 "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
120 "rootwait ${bootargs}\0" \
121 "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
122 "then setenv quiet; fi\0" \
123 "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
124 "/boot/bootcause/firstboot\0" \
125 "swappartitions=setexpr partnum 3 - ${partnum}\0" \
126 "failbootcmd=" \
127 "ppd_lcd_enable; " \
128 "msg=\"Monitor failed to start. " \
129 "Try again, or contact GE Service for support.\"; " \
130 "echo $msg; " \
131 "setenv stdout vga; " \
132 "echo \"\n\n\n\n \" $msg; " \
133 "setenv stdout serial; " \
134 "mw.b 0x7000A000 0xbc; " \
135 "mw.b 0x7000A001 0x00; " \
136 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
137 "altbootcmd=" \
138 "run doquiet; " \
139 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
140 "run hasfirstboot || setenv partnum 0; " \
141 "if test ${partnum} != 0; then " \
142 "setenv bootcause REVERT; " \
143 "run swappartitions loadimage doboot; " \
144 "fi; " \
145 "run failbootcmd\0" \
146 "loadimage=" \
147 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
148 "doboot=" \
149 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
150 "run setargs; " \
151 "run bootargs_emmc; " \
152 "bootm ${loadaddr}\0" \
153 "tryboot=" \
154 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
155 "run loadimage || run swappartitions && run loadimage || " \
156 "setenv partnum 0 && echo MISSING IMAGE;" \
157 "run doboot; " \
158 "run failbootcmd\0" \
159 "video-mode=" \
160 "lcd:800x480-24@60,monitor=lcd\0" \
161
162 #define CONFIG_MMCBOOTCOMMAND \
163 "if mmc dev ${devnum}; then " \
164 "run doquiet; " \
165 "run tryboot; " \
166 "fi; " \
167
168 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
169
170 #define CONFIG_ARP_TIMEOUT 200UL
171
172 /* Miscellaneous configurable options */
173 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
174
175 #define CONFIG_SYS_MAXARGS 48 /* max number of command args */
176 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
177
178 #define CONFIG_SYS_MEMTEST_START 0x70000000
179 #define CONFIG_SYS_MEMTEST_END 0x70010000
180
181 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
182
183 /* Physical Memory Map */
184 #define CONFIG_NR_DRAM_BANKS 2
185 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
186 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
187 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
188 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
189 #define PHYS_SDRAM_SIZE (gd->ram_size)
190
191 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
192 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
193 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
194
195 #define CONFIG_SYS_INIT_SP_OFFSET \
196 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
197 #define CONFIG_SYS_INIT_SP_ADDR \
198 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
199
200 /* FLASH and environment organization */
201 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
202 #define CONFIG_ENV_SIZE (8 * 1024)
203 #define CONFIG_ENV_IS_IN_MMC
204 #define CONFIG_SYS_MMC_ENV_DEV 0
205
206 #define CONFIG_CMD_FUSE
207 #define CONFIG_FSL_IIM
208
209 #define CONFIG_SYS_I2C_SPEED 100000
210
211 /* I2C1 */
212 #define CONFIG_SYS_NUM_I2C_BUSES 9
213 #define CONFIG_SYS_I2C_MAX_HOPS 1
214 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
215 {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
216 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
217 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
218 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
219 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
220 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
221 {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
222 {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
223 }
224
225 #define CONFIG_BCH
226
227 /* Backlight Control */
228 #define CONFIG_PWM_IMX
229 #define CONFIG_IMX6_PWM_PER_CLK 66666000
230
231 /* Framebuffer and LCD */
232 #ifdef CONFIG_VIDEO
233 #define CONFIG_VIDEO_IPUV3
234 #endif
235
236 #endif /* __CONFIG_H */