include/configs/mx53ppd.h

   1 /*
   2  * Copyright (C) 2011 Freescale Semiconductor, Inc.
   3  * Jason Liu <r64343@freescale.com>
   4  *
   5  * Configuration settings for Freescale MX53 low cost board.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 #include <asm/arch/imx-regs.h>
  14
  15 #define CONSOLE_DEV     "ttymxc0"
  16
  17 #define CONFIG_CMDLINE_TAG
  18 #define CONFIG_SETUP_MEMORY_TAGS
  19 #define CONFIG_INITRD_TAG
  20
  21 #define CONFIG_SYS_FSL_CLK
  22
  23 /* Size of malloc() pool */
  24 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  25
  26 #define CONFIG_HW_WATCHDOG
  27 #define CONFIG_IMX_WATCHDOG
  28 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000
  29
  30 #define CONFIG_MISC_INIT_R
  31 #define CONFIG_BOARD_LATE_INIT
  32 #define CONFIG_REVISION_TAG
  33
  34 #define CONFIG_MXC_UART
  35 #define CONFIG_MXC_UART_BASE    UART1_BASE
  36
  37 /* MMC Configs */
  38 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  39 #define CONFIG_SYS_FSL_ESDHC_NUM        2
  40
  41 /* Eth Configs */
  42 #define CONFIG_MII
  43
  44 #define CONFIG_FEC_MXC
  45 #define IMX_FEC_BASE    FEC_BASE_ADDR
  46 #define CONFIG_FEC_MXC_PHYADDR  0x1F
  47
  48 /* USB Configs */
  49 #define CONFIG_USB_EHCI_MX5
  50 #define CONFIG_USB_HOST_ETHER
  51 #define CONFIG_USB_ETHER_ASIX
  52 #define CONFIG_USB_ETHER_MCS7830
  53 #define CONFIG_USB_ETHER_SMSC95XX
  54 #define CONFIG_MXC_USB_PORT     1
  55 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
  56 #define CONFIG_MXC_USB_FLAGS    0
  57
  58 #define CONFIG_SYS_RTC_BUS_NUM          2
  59 #define CONFIG_SYS_I2C_RTC_ADDR 0x30
  60
  61 /* I2C Configs */
  62 #define CONFIG_SYS_I2C
  63 #define CONFIG_SYS_I2C_MXC
  64 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  65 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  66 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  67
  68 /* PMIC Controller */
  69 #define CONFIG_POWER
  70 #define CONFIG_POWER_I2C
  71 #define CONFIG_DIALOG_POWER
  72 #define CONFIG_POWER_FSL
  73 #define CONFIG_POWER_FSL_MC13892
  74 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
  75 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x8
  76
  77 /* allow to overwrite serial and ethaddr */
  78 #define CONFIG_ENV_OVERWRITE
  79 #define CONFIG_BAUDRATE                 115200
  80
  81 /* Command definition */
  82
  83 #define CONFIG_ETHPRIME         "FEC0"
  84
  85 #define CONFIG_LOADADDR         0x72000000      /* loadaddr env var */
  86
  87 #define PPD_CONFIG_NFS \
  88         "nfsserver=192.168.252.95\0" \
  89         "gatewayip=192.168.252.95\0" \
  90         "netmask=255.255.255.0\0" \
  91         "ipaddr=192.168.252.99\0" \
  92         "kernsize=0x2000\0" \
  93         "use_dhcp=0\0" \
  94         "nfsroot=/opt/springdale/rd\0" \
  95         "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
  96                 "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \
  97         "choose_ip=if test $use_dhcp = 1; then set kern_ipconf ip=dhcp; " \
  98                 "set getcmd dhcp; else set kern_ipconf " \
  99                 "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \
 100                 "set getcmd tftp; fi\0" \
 101         "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \
 102                 "${nfsserver}:${image}; bootm ${loadaddr}\0" \
 103
 104 #define CONFIG_EXTRA_ENV_SETTINGS \
 105         PPD_CONFIG_NFS \
 106         "bootlimit=10\0" \
 107         "image=/boot/fitImage\0" \
 108         "fdt_high=0xffffffff\0" \
 109         "dev=mmc\0" \
 110         "devnum=0\0" \
 111         "rootdev=mmcblk0p\0" \
 112         "quiet=quiet loglevel=0\0" \
 113         "console=" CONSOLE_DEV "\0" \
 114         "lvds=ldb\0" \
 115         "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
 116                 "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
 117                 "console=${console} ${rtc_status}\0" \
 118         "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
 119                 "rootwait ${bootargs}\0" \
 120         "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
 121                 "then setenv quiet; fi\0" \
 122         "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
 123                 "/boot/bootcause/firstboot\0" \
 124         "swappartitions=setexpr partnum 3 - ${partnum}\0" \
 125         "failbootcmd=" \
 126                 "ppd_lcd_enable; " \
 127                 "msg=\"Monitor failed to start.  " \
 128                         "Try again, or contact GE Service for support.\"; " \
 129                 "echo $msg; " \
 130                 "setenv stdout vga; " \
 131                 "echo \"\n\n\n\n    \" $msg; " \
 132                 "setenv stdout serial; " \
 133                 "mw.b 0x7000A000 0xbc; " \
 134                 "mw.b 0x7000A001 0x00; " \
 135                 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
 136         "altbootcmd=" \
 137                 "run doquiet; " \
 138                 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
 139                 "run hasfirstboot || setenv partnum 0; " \
 140                 "if test ${partnum} != 0; then " \
 141                         "setenv bootcause REVERT; " \
 142                         "run swappartitions loadimage doboot; " \
 143                 "fi; " \
 144                 "run failbootcmd\0" \
 145         "loadimage=" \
 146                 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
 147         "doboot=" \
 148                 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
 149                 "run setargs; " \
 150                 "run bootargs_emmc; " \
 151                 "bootm ${loadaddr}\0" \
 152         "tryboot=" \
 153                 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
 154                 "run loadimage || run swappartitions && run loadimage || " \
 155                         "setenv partnum 0 && echo MISSING IMAGE;" \
 156                 "run doboot; " \
 157                 "run failbootcmd\0" \
 158         "video-mode=" \
 159                 "lcd:800x480-24@60,monitor=lcd\0" \
 160
 161 #define CONFIG_MMCBOOTCOMMAND \
 162         "if mmc dev ${devnum}; then " \
 163                 "run doquiet; " \
 164                 "run tryboot; " \
 165         "fi; " \
 166
 167 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
 168
 169 #define CONFIG_ARP_TIMEOUT      200UL
 170
 171 /* Miscellaneous configurable options */
 172 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
 173
 174 #define CONFIG_SYS_MAXARGS      48      /* max number of command args */
 175 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
 176
 177 #define CONFIG_SYS_MEMTEST_START       0x70000000
 178 #define CONFIG_SYS_MEMTEST_END         0x70010000
 179
 180 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 181
 182 /* Physical Memory Map */
 183 #define CONFIG_NR_DRAM_BANKS    2
 184 #define PHYS_SDRAM_1                    CSD0_BASE_ADDR
 185 #define PHYS_SDRAM_1_SIZE               (gd->bd->bi_dram[0].size)
 186 #define PHYS_SDRAM_2                    CSD1_BASE_ADDR
 187 #define PHYS_SDRAM_2_SIZE               (gd->bd->bi_dram[1].size)
 188 #define PHYS_SDRAM_SIZE                 (gd->ram_size)
 189
 190 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
 191 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
 192 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
 193
 194 #define CONFIG_SYS_INIT_SP_OFFSET \
 195         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 196 #define CONFIG_SYS_INIT_SP_ADDR \
 197         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 198
 199 /* FLASH and environment organization */
 200 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
 201 #define CONFIG_ENV_SIZE        (8 * 1024)
 202 #define CONFIG_ENV_IS_IN_MMC
 203 #define CONFIG_SYS_MMC_ENV_DEV 0
 204
 205 #define CONFIG_CMD_FUSE
 206 #define CONFIG_FSL_IIM
 207
 208 #define CONFIG_SYS_I2C_SPEED    100000
 209
 210 /* I2C1 */
 211 #define CONFIG_SYS_NUM_I2C_BUSES        9
 212 #define CONFIG_SYS_I2C_MAX_HOPS         1
 213 #define CONFIG_SYS_I2C_BUSES    {       {0, {I2C_NULL_HOP} }, \
 214                                         {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
 215                                         {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
 216                                         {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
 217                                         {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
 218                                         {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
 219                                         {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
 220                                         {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
 221                                         {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
 222                                 }
 223
 224 #define CONFIG_BCH
 225
 226 /* Backlight Control */
 227 #define CONFIG_PWM_IMX
 228 #define CONFIG_IMX6_PWM_PER_CLK 66666000
 229
 230 /* Framebuffer and LCD */
 231 #ifdef CONFIG_VIDEO
 232         #define CONFIG_VIDEO_IPUV3
 233 #endif
 234
 235 #endif                          /* __CONFIG_H */