include/configs/mx6qsabrelite.h

   1 /*
   2  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
   3  *
   4  * Configuration settings for the Freescale i.MX6Q Sabre Lite board.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #ifndef __CONFIG_H
  23 #define __CONFIG_H
  24
  25 #define CONFIG_MX6
  26 #define CONFIG_MX6Q
  27 #define CONFIG_DISPLAY_CPUINFO
  28 #define CONFIG_DISPLAY_BOARDINFO
  29
  30 #define CONFIG_MACH_TYPE        3769
  31
  32 #include <asm/arch/imx-regs.h>
  33 #include <asm/imx-common/gpio.h>
  34
  35 #define CONFIG_CMDLINE_TAG
  36 #define CONFIG_SETUP_MEMORY_TAGS
  37 #define CONFIG_INITRD_TAG
  38 #define CONFIG_REVISION_TAG
  39
  40 /* Size of malloc() pool */
  41 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  42
  43 #define CONFIG_BOARD_EARLY_INIT_F
  44 #define CONFIG_MISC_INIT_R
  45 #define CONFIG_MXC_GPIO
  46
  47 #define CONFIG_MXC_UART
  48 #define CONFIG_MXC_UART_BASE           UART2_BASE
  49
  50 #define CONFIG_CMD_SF
  51 #ifdef CONFIG_CMD_SF
  52 #define CONFIG_SPI_FLASH
  53 #define CONFIG_SPI_FLASH_SST
  54 #define CONFIG_MXC_SPI
  55 #define CONFIG_SF_DEFAULT_BUS  0
  56 #define CONFIG_SF_DEFAULT_CS   (0|(IMX_GPIO_NR(3, 19)<<8))
  57 #define CONFIG_SF_DEFAULT_SPEED 25000000
  58 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
  59 #endif
  60
  61 /* I2C Configs */
  62 #define CONFIG_CMD_I2C
  63 #define CONFIG_I2C_MULTI_BUS
  64 #define CONFIG_I2C_MXC
  65 #define CONFIG_SYS_I2C_SPEED            100000
  66
  67 /* MMC Configs */
  68 #define CONFIG_FSL_ESDHC
  69 #define CONFIG_FSL_USDHC
  70 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
  71 #define CONFIG_SYS_FSL_USDHC_NUM       2
  72
  73 #define CONFIG_MMC
  74 #define CONFIG_CMD_MMC
  75 #define CONFIG_GENERIC_MMC
  76 #define CONFIG_BOUNCE_BUFFER
  77 #define CONFIG_CMD_EXT2
  78 #define CONFIG_CMD_FAT
  79 #define CONFIG_DOS_PARTITION
  80
  81 #define CONFIG_CMD_SATA
  82 /*
  83  * SATA Configs
  84  */
  85 #ifdef CONFIG_CMD_SATA
  86 #define CONFIG_DWC_AHSATA
  87 #define CONFIG_SYS_SATA_MAX_DEVICE      1
  88 #define CONFIG_DWC_AHSATA_PORT_ID       0
  89 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
  90 #define CONFIG_LBA48
  91 #define CONFIG_LIBATA
  92 #endif
  93
  94 #define CONFIG_CMD_PING
  95 #define CONFIG_CMD_DHCP
  96 #define CONFIG_CMD_MII
  97 #define CONFIG_CMD_NET
  98 #define CONFIG_FEC_MXC
  99 #define CONFIG_MII
 100 #define IMX_FEC_BASE                    ENET_BASE_ADDR
 101 #define CONFIG_FEC_XCV_TYPE             RGMII
 102 #define CONFIG_ETHPRIME                 "FEC"
 103 #define CONFIG_FEC_MXC_PHYADDR          6
 104 #define CONFIG_PHYLIB
 105 #define CONFIG_PHY_MICREL
 106 #define CONFIG_PHY_MICREL_KSZ9021
 107
 108 /* USB Configs */
 109 #define CONFIG_CMD_USB
 110 #define CONFIG_CMD_FAT
 111 #define CONFIG_USB_EHCI
 112 #define CONFIG_USB_EHCI_MX6
 113 #define CONFIG_USB_STORAGE
 114 #define CONFIG_USB_HOST_ETHER
 115 #define CONFIG_USB_ETHER_ASIX
 116 #define CONFIG_USB_ETHER_SMSC95XX
 117 #define CONFIG_MXC_USB_PORT     1
 118 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
 119 #define CONFIG_MXC_USB_FLAGS    0
 120
 121 /* Miscellaneous commands */
 122 #define CONFIG_CMD_BMODE
 123
 124 /* Framebuffer and LCD */
 125 #define CONFIG_VIDEO
 126 #define CONFIG_VIDEO_IPUV3
 127 #define CONFIG_CFB_CONSOLE
 128 #define CONFIG_VGA_AS_SINGLE_DEVICE
 129 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 130 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 131 #define CONFIG_VIDEO_BMP_RLE8
 132 #define CONFIG_SPLASH_SCREEN
 133 #define CONFIG_BMP_16BPP
 134 #define CONFIG_VIDEO_LOGO
 135 #define CONFIG_IPUV3_CLK 260000000
 136
 137 /* allow to overwrite serial and ethaddr */
 138 #define CONFIG_ENV_OVERWRITE
 139 #define CONFIG_CONS_INDEX              1
 140 #define CONFIG_BAUDRATE                        115200
 141
 142 /* Command definition */
 143 #include <config_cmd_default.h>
 144
 145 #undef CONFIG_CMD_IMLS
 146
 147 #define CONFIG_BOOTDELAY               1
 148
 149 #define CONFIG_PREBOOT                 ""
 150
 151 #define CONFIG_LOADADDR                        0x10800000
 152 #define CONFIG_SYS_TEXT_BASE           0x17800000
 153
 154 #define CONFIG_EXTRA_ENV_SETTINGS \
 155        "script=boot.scr\0" \
 156        "uimage=uImage\0" \
 157         "console=ttymxc1\0" \
 158         "fdt_high=0xffffffff\0"   \
 159         "initrd_high=0xffffffff\0" \
 160        "mmcdev=0\0" \
 161        "mmcpart=2\0" \
 162        "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
 163        "mmcargs=setenv bootargs console=${console},${baudrate} " \
 164                "root=${mmcroot}\0" \
 165        "loadbootscript=" \
 166                "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 167        "bootscript=echo Running bootscript from mmc ...; " \
 168                "source\0" \
 169        "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
 170        "mmcboot=echo Booting from mmc ...; " \
 171                "run mmcargs; " \
 172                "bootm\0" \
 173        "netargs=setenv bootargs console=${console},${baudrate} " \
 174                "root=/dev/nfs " \
 175                "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 176        "netboot=echo Booting from net ...; " \
 177                "run netargs; " \
 178                "dhcp ${uimage}; bootm\0" \
 179
 180 #define CONFIG_BOOTCOMMAND \
 181        "mmc dev ${mmcdev};" \
 182        "mmc dev ${mmcdev}; if mmc rescan; then " \
 183                "if run loadbootscript; then " \
 184                        "run bootscript; " \
 185                "else " \
 186                        "if run loaduimage; then " \
 187                                "run mmcboot; " \
 188                        "else run netboot; " \
 189                        "fi; " \
 190                "fi; " \
 191        "else run netboot; fi"
 192
 193 #define CONFIG_ARP_TIMEOUT     200UL
 194
 195 /* Miscellaneous configurable options */
 196 #define CONFIG_SYS_LONGHELP
 197 #define CONFIG_SYS_HUSH_PARSER
 198 #define CONFIG_SYS_PROMPT              "MX6QSABRELITE U-Boot > "
 199 #define CONFIG_AUTO_COMPLETE
 200 #define CONFIG_SYS_CBSIZE              256
 201
 202 /* Print Buffer Size */
 203 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 204 #define CONFIG_SYS_MAXARGS             16
 205 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 206
 207 #define CONFIG_SYS_MEMTEST_START       0x10000000
 208 #define CONFIG_SYS_MEMTEST_END         0x10010000
 209
 210 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 211 #define CONFIG_SYS_HZ                  1000
 212
 213 #define CONFIG_CMDLINE_EDITING
 214
 215 /* Physical Memory Map */
 216 #define CONFIG_NR_DRAM_BANKS           1
 217 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 218 #define PHYS_SDRAM_SIZE                        (1u * 1024 * 1024 * 1024)
 219
 220 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
 221 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
 222 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 223
 224 #define CONFIG_SYS_INIT_SP_OFFSET \
 225        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 226 #define CONFIG_SYS_INIT_SP_ADDR \
 227        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 228
 229 /* FLASH and environment organization */
 230 #define CONFIG_SYS_NO_FLASH
 231
 232 #define CONFIG_ENV_SIZE                 (8 * 1024)
 233
 234 #define CONFIG_ENV_IS_IN_MMC
 235 /* #define CONFIG_ENV_IS_IN_SPI_FLASH */
 236
 237 #if defined(CONFIG_ENV_IS_IN_MMC)
 238 #define CONFIG_ENV_OFFSET               (6 * 64 * 1024)
 239 #define CONFIG_SYS_MMC_ENV_DEV          0
 240 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 241 #define CONFIG_ENV_OFFSET               (768 * 1024)
 242 #define CONFIG_ENV_SECT_SIZE            (8 * 1024)
 243 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
 244 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
 245 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
 246 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 247 #endif
 248
 249 #define CONFIG_OF_LIBFDT
 250 #define CONFIG_CMD_BOOTZ
 251
 252 #ifndef CONFIG_SYS_DCACHE_OFF
 253 #define CONFIG_CMD_CACHE
 254 #endif
 255
 256 #endif                         /* __CONFIG_H */