include/configs/mx6sabresd.h

   1 /*
   2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3  *
   4  * Configuration settings for the Freescale i.MX6Q SabreSD board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __MX6QSABRESD_CONFIG_H
  10 #define __MX6QSABRESD_CONFIG_H
  11
  12 #ifdef CONFIG_SPL
  13 #include "imx6_spl.h"
  14 #undef CONFIG_SPL_EXT_SUPPORT
  15 #endif
  16
  17 #define CONFIG_MACH_TYPE        3980
  18 #define CONFIG_MXC_UART_BASE    UART1_BASE
  19 #define CONFIG_CONSOLE_DEV              "ttymxc0"
  20 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"
  21
  22 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
  23
  24 #include "mx6sabre_common.h"
  25
  26 /* Falcon Mode */
  27 #define CONFIG_CMD_SPL
  28 #define CONFIG_SPL_OS_BOOT
  29 #define CONFIG_SYS_SPL_ARGS_ADDR       0x18000000
  30 #define CONFIG_CMD_SPL_WRITE_SIZE      (128 * SZ_1K)
  31
  32 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
  33 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x800   /* 1MB */
  34 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
  35 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x1000  /* 2MB */
  36
  37 #define CONFIG_SYS_FSL_USDHC_NUM        3
  38 #if defined(CONFIG_ENV_IS_IN_MMC)
  39 #define CONFIG_SYS_MMC_ENV_DEV          1       /* SDHC3 */
  40 #endif
  41
  42 #define CONFIG_CMD_PCI
  43 #ifdef CONFIG_CMD_PCI
  44 #define CONFIG_PCI
  45 #define CONFIG_PCI_PNP
  46 #define CONFIG_PCI_SCAN_SHOW
  47 #define CONFIG_PCIE_IMX
  48 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
  49 #define CONFIG_PCIE_IMX_POWER_GPIO      IMX_GPIO_NR(3, 19)
  50 #endif
  51
  52 /* I2C Configs */
  53 #define CONFIG_SYS_I2C
  54 #define CONFIG_SYS_I2C_MXC
  55 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  56 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  57 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  58 #define CONFIG_SYS_I2C_SPEED              100000
  59
  60 /* PMIC */
  61 #define CONFIG_POWER
  62 #define CONFIG_POWER_I2C
  63 #define CONFIG_POWER_PFUZE100
  64 #define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
  65
  66 /* USB Configs */
  67 #ifdef CONFIG_CMD_USB
  68 #define CONFIG_USB_EHCI
  69 #define CONFIG_USB_EHCI_MX6
  70 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  71 #define CONFIG_USB_HOST_ETHER
  72 #define CONFIG_USB_ETHER_ASIX
  73 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
  74 #define CONFIG_MXC_USB_FLAGS            0
  75 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
  76 #endif
  77
  78 #endif                         /* __MX6QSABRESD_CONFIG_H */