include/configs/mx6sxsabreauto.h

   1 /*
   2  * Copyright 2014 Freescale Semiconductor, Inc.
   3  *
   4  * Configuration settings for the Freescale i.MX6SX Sabreauto board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 #include "mx6_common.h"
  14
  15
  16 /* Size of malloc() pool */
  17 #define CONFIG_SYS_MALLOC_LEN           (3 * SZ_1M)
  18
  19 #define CONFIG_BOARD_EARLY_INIT_F
  20 #define CONFIG_BOARD_LATE_INIT
  21
  22 #define CONFIG_MXC_UART
  23 #define CONFIG_MXC_UART_BASE            UART1_BASE
  24
  25 #define CONFIG_EXTRA_ENV_SETTINGS \
  26         "script=boot.scr\0" \
  27         "image=zImage\0" \
  28         "console=ttymxc0\0" \
  29         "fdt_high=0xffffffff\0" \
  30         "initrd_high=0xffffffff\0" \
  31         "fdt_file=imx6sx-sabreauto.dtb\0" \
  32         "fdt_addr=0x88000000\0" \
  33         "boot_fdt=try\0" \
  34         "ip_dyn=yes\0" \
  35         "mmcdev=0\0" \
  36         "mmcpart=1\0" \
  37         "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
  38         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  39                 "root=${mmcroot}\0" \
  40         "loadbootscript=" \
  41                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  42         "bootscript=echo Running bootscript from mmc ...; " \
  43                 "source\0" \
  44         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  45         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  46         "mmcboot=echo Booting from mmc ...; " \
  47                 "run mmcargs; " \
  48                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  49                         "if run loadfdt; then " \
  50                                 "bootz ${loadaddr} - ${fdt_addr}; " \
  51                         "else " \
  52                                 "if test ${boot_fdt} = try; then " \
  53                                         "bootz; " \
  54                                 "else " \
  55                                         "echo WARN: Cannot load the DT; " \
  56                                 "fi; " \
  57                         "fi; " \
  58                 "else " \
  59                         "bootz; " \
  60                 "fi;\0" \
  61         "netargs=setenv bootargs console=${console},${baudrate} " \
  62                 "root=/dev/nfs " \
  63         "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  64                 "netboot=echo Booting from net ...; " \
  65                 "run netargs; " \
  66                 "if test ${ip_dyn} = yes; then " \
  67                         "setenv get_cmd dhcp; " \
  68                 "else " \
  69                         "setenv get_cmd tftp; " \
  70                 "fi; " \
  71                 "${get_cmd} ${image}; " \
  72                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  73                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  74                                 "bootz ${loadaddr} - ${fdt_addr}; " \
  75                         "else " \
  76                                 "if test ${boot_fdt} = try; then " \
  77                                         "bootz; " \
  78                                 "else " \
  79                                         "echo WARN: Cannot load the DT; " \
  80                                 "fi; " \
  81                         "fi; " \
  82                 "else " \
  83                         "bootz; " \
  84                 "fi;\0"
  85
  86 #define CONFIG_BOOTCOMMAND \
  87            "mmc dev ${mmcdev};" \
  88            "mmc dev ${mmcdev}; if mmc rescan; then " \
  89                    "if run loadbootscript; then " \
  90                            "run bootscript; " \
  91                    "else " \
  92                            "if run loadimage; then " \
  93                                    "run mmcboot; " \
  94                            "else run netboot; " \
  95                            "fi; " \
  96                    "fi; " \
  97            "else run netboot; fi"
  98
  99 /* Miscellaneous configurable options */
 100 #define CONFIG_SYS_MEMTEST_START        0x80000000
 101 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x10000)
 102
 103 #define CONFIG_STACKSIZE                SZ_128K
 104
 105 /* Physical Memory Map */
 106 #define CONFIG_NR_DRAM_BANKS            1
 107 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
 108 #define PHYS_SDRAM_SIZE                 SZ_2G
 109
 110 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 111 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 112 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 113
 114 #define CONFIG_SYS_INIT_SP_OFFSET \
 115         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 116 #define CONFIG_SYS_INIT_SP_ADDR \
 117         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 118
 119 /* MMC Configuration */
 120 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
 121
 122 /* I2C Configs */
 123 #define CONFIG_SYS_I2C
 124 #define CONFIG_SYS_I2C_MXC
 125 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
 126 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
 127 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
 128 #define CONFIG_SYS_I2C_SPEED              100000
 129
 130 /* PMIC */
 131 #define CONFIG_POWER
 132 #define CONFIG_POWER_I2C
 133 #define CONFIG_POWER_PFUZE100
 134 #define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
 135
 136 /* NAND flash command */
 137 #define CONFIG_CMD_NAND
 138 #define CONFIG_CMD_NAND_TRIMFFS
 139
 140 /* NAND stuff */
 141 #define CONFIG_NAND_MXS
 142 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 143 #define CONFIG_SYS_NAND_BASE           0x40000000
 144 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 145 #define CONFIG_SYS_NAND_ONFI_DETECTION
 146
 147 /* DMA stuff, needed for GPMI/MXS NAND support */
 148 #define CONFIG_APBH_DMA
 149 #define CONFIG_APBH_DMA_BURST
 150 #define CONFIG_APBH_DMA_BURST8
 151
 152 /* Network */
 153 #define CONFIG_CMD_MII
 154
 155 #define CONFIG_FEC_MXC
 156 #define CONFIG_MII
 157
 158 #define IMX_FEC_BASE                    ENET2_BASE_ADDR
 159 #define CONFIG_FEC_MXC_PHYADDR          0x0
 160
 161 #define CONFIG_FEC_XCV_TYPE             RGMII
 162 #define CONFIG_ETHPRIME                 "FEC"
 163
 164 #define CONFIG_PHYLIB
 165 #define CONFIG_PHY_ATHEROS
 166
 167
 168 #ifdef CONFIG_CMD_USB
 169 #define CONFIG_USB_EHCI
 170 #define CONFIG_USB_EHCI_MX6
 171 #define CONFIG_USB_STORAGE
 172 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 173 #define CONFIG_USB_HOST_ETHER
 174 #define CONFIG_USB_ETHER_ASIX
 175 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 176 #define CONFIG_MXC_USB_FLAGS   0
 177 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 178 #endif
 179
 180 #define CONFIG_IMX_THERMAL
 181
 182
 183 #define CONFIG_FSL_QSPI
 184 #ifdef CONFIG_FSL_QSPI
 185 #define CONFIG_SYS_FSL_QSPI_AHB
 186 #define CONFIG_SF_DEFAULT_BUS           0
 187 #define CONFIG_SF_DEFAULT_CS            0
 188 #define CONFIG_SF_DEFAULT_SPEED 40000000
 189 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 190 #define FSL_QSPI_FLASH_SIZE             SZ_32M
 191 #define FSL_QSPI_FLASH_NUM              2
 192 #endif
 193
 194 #define CONFIG_ENV_OFFSET               (8 * SZ_64K)
 195 #define CONFIG_ENV_SIZE                 SZ_8K
 196 #define CONFIG_ENV_IS_IN_MMC
 197
 198 #define CONFIG_SYS_FSL_USDHC_NUM        2
 199 #if defined(CONFIG_ENV_IS_IN_MMC)
 200 #define CONFIG_SYS_MMC_ENV_DEV          0  /*USDHC3*/
 201 #endif
 202
 203 #define CONFIG_PCA953X
 204 #define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x30, 8}, {0x32, 8}, {0x34, 8} }
 205
 206 #endif                          /* __CONFIG_H */