]> git.ipfire.org Git - u-boot.git/blob - include/configs/mx7dsabresd.h
configs: Re-sync almost all of cmd/Kconfig
[u-boot.git] / include / configs / mx7dsabresd.h
1 /*
2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX7D SABRESD board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __MX7D_SABRESD_CONFIG_H
10 #define __MX7D_SABRESD_CONFIG_H
11
12 #include "mx7_common.h"
13
14 #define CONFIG_DBG_MONITOR
15 #define PHYS_SDRAM_SIZE SZ_1G
16
17 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
18
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
21
22 #define CONFIG_BOARD_EARLY_INIT_F
23 #define CONFIG_BOARD_LATE_INIT
24
25 /* Uncomment to enable secure boot support */
26 /* #define CONFIG_SECURE_BOOT */
27 #define CONFIG_CSF_SIZE 0x4000
28
29 /* Network */
30 #define CONFIG_CMD_MII
31 #define CONFIG_FEC_MXC
32 #define CONFIG_MII
33 #define CONFIG_FEC_XCV_TYPE RGMII
34 #define CONFIG_ETHPRIME "FEC"
35 #define CONFIG_FEC_MXC_PHYADDR 0
36
37 #define CONFIG_PHYLIB
38 #define CONFIG_PHY_BROADCOM
39 /* ENET1 */
40 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR
41
42 /* MMC Config*/
43 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
44
45 /* PMIC */
46 #define CONFIG_POWER
47 #define CONFIG_POWER_I2C
48 #define CONFIG_POWER_PFUZE3000
49 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
50
51 #undef CONFIG_BOOTM_NETBSD
52 #undef CONFIG_BOOTM_PLAN9
53 #undef CONFIG_BOOTM_RTEMS
54
55 /* I2C configs */
56 #define CONFIG_SYS_I2C
57 #define CONFIG_SYS_I2C_MXC
58 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
59 #define CONFIG_SYS_I2C_SPEED 100000
60
61 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
62 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
63
64 #ifdef CONFIG_IMX_BOOTAUX
65 /* Set to QSPI1 A flash at default */
66 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
67
68 #define UPDATE_M4_ENV \
69 "m4image=m4_qspi.bin\0" \
70 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
71 "update_m4_from_sd=" \
72 "if sf probe 0:0; then " \
73 "if run loadm4image; then " \
74 "setexpr fw_sz ${filesize} + 0xffff; " \
75 "setexpr fw_sz ${fw_sz} / 0x10000; " \
76 "setexpr fw_sz ${fw_sz} * 0x10000; " \
77 "sf erase 0x0 ${fw_sz}; " \
78 "sf write ${loadaddr} 0x0 ${filesize}; " \
79 "fi; " \
80 "fi\0" \
81 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
82 #else
83 #define UPDATE_M4_ENV ""
84 #endif
85
86 #define CONFIG_MFG_ENV_SETTINGS \
87 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
88 "rdinit=/linuxrc " \
89 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
90 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
91 "g_mass_storage.iSerialNumber=\"\" "\
92 "clk_ignore_unused "\
93 "\0" \
94 "initrd_addr=0x83800000\0" \
95 "initrd_high=0xffffffff\0" \
96 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
97
98 #define CONFIG_DFU_ENV_SETTINGS \
99 "dfu_alt_info=image raw 0 0x800000;"\
100 "u-boot raw 0 0x4000;"\
101 "bootimg part 0 1;"\
102 "rootfs part 0 2\0" \
103
104 #define CONFIG_EXTRA_ENV_SETTINGS \
105 UPDATE_M4_ENV \
106 CONFIG_MFG_ENV_SETTINGS \
107 CONFIG_DFU_ENV_SETTINGS \
108 "script=boot.scr\0" \
109 "image=zImage\0" \
110 "console=ttymxc0\0" \
111 "fdt_high=0xffffffff\0" \
112 "initrd_high=0xffffffff\0" \
113 "fdt_file=imx7d-sdb.dtb\0" \
114 "fdt_addr=0x83000000\0" \
115 "boot_fdt=try\0" \
116 "ip_dyn=yes\0" \
117 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
118 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
119 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
120 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
121 "mmcautodetect=yes\0" \
122 "mmcargs=setenv bootargs console=${console},${baudrate} " \
123 "root=${mmcroot}\0" \
124 "loadbootscript=" \
125 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
126 "bootscript=echo Running bootscript from mmc ...; " \
127 "source\0" \
128 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
129 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
130 "mmcboot=echo Booting from mmc ...; " \
131 "run mmcargs; " \
132 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
133 "if run loadfdt; then " \
134 "bootz ${loadaddr} - ${fdt_addr}; " \
135 "else " \
136 "if test ${boot_fdt} = try; then " \
137 "bootz; " \
138 "else " \
139 "echo WARN: Cannot load the DT; " \
140 "fi; " \
141 "fi; " \
142 "else " \
143 "bootz; " \
144 "fi;\0" \
145 "netargs=setenv bootargs console=${console},${baudrate} " \
146 "root=/dev/nfs " \
147 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
148 "netboot=echo Booting from net ...; " \
149 "run netargs; " \
150 "if test ${ip_dyn} = yes; then " \
151 "setenv get_cmd dhcp; " \
152 "else " \
153 "setenv get_cmd tftp; " \
154 "fi; " \
155 "${get_cmd} ${image}; " \
156 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
157 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
158 "bootz ${loadaddr} - ${fdt_addr}; " \
159 "else " \
160 "if test ${boot_fdt} = try; then " \
161 "bootz; " \
162 "else " \
163 "echo WARN: Cannot load the DT; " \
164 "fi; " \
165 "fi; " \
166 "else " \
167 "bootz; " \
168 "fi;\0"
169
170 #define CONFIG_BOOTCOMMAND \
171 "mmc dev ${mmcdev};" \
172 "mmc dev ${mmcdev}; if mmc rescan; then " \
173 "if run loadbootscript; then " \
174 "run bootscript; " \
175 "else " \
176 "if run loadimage; then " \
177 "run mmcboot; " \
178 "else run netboot; " \
179 "fi; " \
180 "fi; " \
181 "else run netboot; fi"
182
183 #define CONFIG_SYS_MEMTEST_START 0x80000000
184 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
185
186 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
187 #define CONFIG_SYS_HZ 1000
188
189 #define CONFIG_STACKSIZE SZ_128K
190
191 /* Physical Memory Map */
192 #define CONFIG_NR_DRAM_BANKS 1
193 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
194
195 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
196 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
197 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
198
199 #define CONFIG_SYS_INIT_SP_OFFSET \
200 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
201 #define CONFIG_SYS_INIT_SP_ADDR \
202 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
203
204 /* FLASH and environment organization */
205 #define CONFIG_SYS_NO_FLASH
206 #define CONFIG_ENV_SIZE SZ_8K
207 #define CONFIG_ENV_IS_IN_MMC
208
209 /*
210 * If want to use nand, define CONFIG_NAND_MXS and rework board
211 * to support nand, since emmc has pin conflicts with nand
212 */
213 #ifdef CONFIG_NAND_MXS
214 #define CONFIG_CMD_NAND
215 #define CONFIG_CMD_NAND_TRIMFFS
216
217 /* NAND stuff */
218 #define CONFIG_SYS_MAX_NAND_DEVICE 1
219 #define CONFIG_SYS_NAND_BASE 0x40000000
220 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
221 #define CONFIG_SYS_NAND_ONFI_DETECTION
222
223 /* DMA stuff, needed for GPMI/MXS NAND support */
224 #define CONFIG_APBH_DMA
225 #define CONFIG_APBH_DMA_BURST
226 #define CONFIG_APBH_DMA_BURST8
227 #endif
228
229 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
230 #ifdef CONFIG_NAND_MXS
231 #define CONFIG_SYS_FSL_USDHC_NUM 1
232 #else
233 #define CONFIG_SYS_FSL_USDHC_NUM 2
234 #endif
235
236 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
237 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
238 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
239
240 /* USB Configs */
241 #define CONFIG_USB_EHCI
242 #define CONFIG_USB_EHCI_MX7
243 #define CONFIG_USB_STORAGE
244 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
245 #define CONFIG_USB_HOST_ETHER
246 #define CONFIG_USB_ETHER_ASIX
247 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
248 #define CONFIG_MXC_USB_FLAGS 0
249 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
250
251 #define CONFIG_IMX_THERMAL
252
253 #define CONFIG_USBD_HS
254
255 #define CONFIG_CMD_USB_MASS_STORAGE
256 #define CONFIG_USB_FUNCTION_MASS_STORAGE
257
258 /* USB Device Firmware Update support */
259 #define CONFIG_CMD_DFU
260 #define CONFIG_USB_FUNCTION_DFU
261 #define CONFIG_DFU_MMC
262 #define CONFIG_DFU_RAM
263
264 #define CONFIG_VIDEO
265 #ifdef CONFIG_VIDEO
266 #define CONFIG_CFB_CONSOLE
267 #define CONFIG_VIDEO_MXS
268 #define CONFIG_VIDEO_LOGO
269 #define CONFIG_VIDEO_SW_CURSOR
270 #define CONFIG_VGA_AS_SINGLE_DEVICE
271 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
272 #define CONFIG_SPLASH_SCREEN
273 #define CONFIG_SPLASH_SCREEN_ALIGN
274 #define CONFIG_CMD_BMP
275 #define CONFIG_BMP_16BPP
276 #define CONFIG_VIDEO_BMP_RLE8
277 #define CONFIG_VIDEO_BMP_LOGO
278 #endif
279
280 #ifdef CONFIG_FSL_QSPI
281 #define CONFIG_SPI_FLASH
282 #define CONFIG_SPI_FLASH_MACRONIX
283 #define CONFIG_SPI_FLASH_BAR
284 #define CONFIG_SF_DEFAULT_BUS 0
285 #define CONFIG_SF_DEFAULT_CS 0
286 #define CONFIG_SF_DEFAULT_SPEED 40000000
287 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
288 #define FSL_QSPI_FLASH_NUM 1
289 #define FSL_QSPI_FLASH_SIZE SZ_64M
290 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
291 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
292 #endif
293
294 #endif /* __CONFIG_H */