include/configs/mxs.h

   1 /*
   2  * Copyright (C) 2013 Marek Vasut <marex@denx.de>
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation; either version 2 of
   7  * the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17  * MA 02111-1307 USA
  18  */
  19 #ifndef __CONFIGS_MXS_H__
  20 #define __CONFIGS_MXS_H__
  21
  22 /*
  23  * Includes
  24  */
  25
  26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28)
  27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
  28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
  29 #error Select one of CONFIG_MX23 or CONFIG_MX28 !
  30 #endif
  31
  32 #include <asm/arch/regs-base.h>
  33
  34 #if defined(CONFIG_MX23)
  35 #include <asm/arch/iomux-mx23.h>
  36 #elif defined(CONFIG_MX28)
  37 #include <asm/arch/iomux-mx28.h>
  38 #endif
  39
  40 /*
  41  * CPU specifics
  42  */
  43
  44 /* Startup hooks */
  45
  46 /* SPL */
  47 #ifndef CONFIG_SPL_FRAMEWORK
  48 #define CONFIG_SPL_NO_CPU_SUPPORT
  49 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
  50 #endif
  51
  52 /* Memory sizes */
  53 #define CONFIG_SYS_MALLOC_LEN           0x00400000      /* 4 MB for malloc */
  54
  55 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
  56 #define CONFIG_SYS_INIT_RAM_ADDR        0x00000000
  57 #if defined(CONFIG_MX23)
  58 #define CONFIG_SYS_INIT_RAM_SIZE        (32 * 1024)
  59 #elif defined(CONFIG_MX28)
  60 #define CONFIG_SYS_INIT_RAM_SIZE        (128 * 1024)
  61 #endif
  62
  63 /* Point initial SP in SRAM so SPL can use it too. */
  64 #define CONFIG_SYS_INIT_SP_OFFSET \
  65         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  66 #define CONFIG_SYS_INIT_SP_ADDR \
  67         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  68
  69 /*
  70  * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
  71  * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
  72  * binary. In case there was more of this mess, 0x100 bytes are skipped.
  73  *
  74  * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
  75  * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
  76  * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
  77  *
  78  * As for the SPL, we must avoid the first 4 KiB as well, but we load the
  79  * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
  80  */
  81
  82 /* U-Boot general configuration */
  83 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O buffer size */
  84 #define CONFIG_SYS_MAXARGS      32              /* Max number of command args */
  85 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
  86                                                 /* Boot argument buffer size */
  87
  88 /* Booting Linux */
  89 #define CONFIG_CMDLINE_TAG
  90 #define CONFIG_SETUP_MEMORY_TAGS
  91
  92 /*
  93  * Drivers
  94  */
  95 /*
  96  * DUART Serial Driver.
  97  * Conflicts with AUART driver which can be set by board.
  98  */
  99 #define CONFIG_PL011_CLOCK              24000000
 100 #define CONFIG_PL01x_PORTS              { (void *)MXS_UARTDBG_BASE }
 101 /* Default baudrate can be overridden by board! */
 102
 103 /* FEC Ethernet on SoC */
 104 #ifdef CONFIG_FEC_MXC
 105 #ifndef CONFIG_ETHPRIME
 106 #define CONFIG_ETHPRIME                 "FEC0"
 107 #endif
 108 #ifndef CONFIG_FEC_XCV_TYPE
 109 #define CONFIG_FEC_XCV_TYPE             RMII
 110 #endif
 111 #endif
 112
 113 /* LCD */
 114 #ifdef CONFIG_VIDEO
 115 #define CONFIG_VIDEO_MXS
 116 #endif
 117
 118 /* NAND */
 119 #ifdef CONFIG_CMD_NAND
 120 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 121 #define CONFIG_SYS_NAND_BASE            0x60000000
 122 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 123 #endif
 124
 125 /* OCOTP */
 126 #ifdef CONFIG_CMD_FUSE
 127 #define CONFIG_MXS_OCOTP
 128 #endif
 129
 130 /* SPI */
 131 #ifdef CONFIG_CMD_SPI
 132 #define CONFIG_SPI_HALF_DUPLEX
 133 #endif
 134
 135 /* USB */
 136 #ifdef CONFIG_CMD_USB
 137 #define CONFIG_USB_EHCI_MXS
 138 #define CONFIG_EHCI_IS_TDI
 139 #endif
 140
 141 #endif  /* __CONFIGS_MXS_H__ */