include/configs/mxs.h

   1 /*
   2  * Copyright (C) 2013 Marek Vasut <marex@denx.de>
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation; either version 2 of
   7  * the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17  * MA 02111-1307 USA
  18  */
  19 #ifndef __CONFIGS_MXS_H__
  20 #define __CONFIGS_MXS_H__
  21
  22 /*
  23  * Includes
  24  */
  25
  26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28)
  27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
  28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
  29 #error Select one of CONFIG_MX23 or CONFIG_MX28 !
  30 #endif
  31
  32 #include <asm/arch/regs-base.h>
  33
  34 #if defined(CONFIG_MX23)
  35 #include <asm/arch/iomux-mx23.h>
  36 #elif defined(CONFIG_MX28)
  37 #include <asm/arch/iomux-mx28.h>
  38 #endif
  39
  40 /*
  41  * CPU specifics
  42  */
  43
  44 /* Startup hooks */
  45 #define CONFIG_ARCH_MISC_INIT
  46
  47 /* SPL */
  48 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
  49 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
  50 #define CONFIG_SPL_LDSCRIPT     "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
  51
  52 /* Memory sizes */
  53 #define CONFIG_SYS_MALLOC_LEN           0x00400000      /* 4 MB for malloc */
  54 #define CONFIG_SYS_MEMTEST_START        0x40000000      /* Memtest start adr */
  55 #define CONFIG_SYS_MEMTEST_END          0x40400000      /* 4 MB RAM test */
  56
  57 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
  58 #define CONFIG_SYS_INIT_RAM_ADDR        0x00000000
  59 #if defined(CONFIG_MX23)
  60 #define CONFIG_SYS_INIT_RAM_SIZE        (32 * 1024)
  61 #elif defined(CONFIG_MX28)
  62 #define CONFIG_SYS_INIT_RAM_SIZE        (128 * 1024)
  63 #endif
  64
  65 /* Point initial SP in SRAM so SPL can use it too. */
  66 #define CONFIG_SYS_INIT_SP_OFFSET \
  67         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  68 #define CONFIG_SYS_INIT_SP_ADDR \
  69         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  70
  71 /*
  72  * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
  73  * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
  74  * binary. In case there was more of this mess, 0x100 bytes are skipped.
  75  *
  76  * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
  77  * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
  78  * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
  79  *
  80  * As for the SPL, we must avoid the first 4 KiB as well, but we load the
  81  * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
  82  */
  83 #define CONFIG_SYS_TEXT_BASE            0x40002000
  84 #define CONFIG_SPL_TEXT_BASE            0x00001000
  85
  86 /* U-Boot general configuration */
  87 #define CONFIG_SYS_LONGHELP
  88 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O buffer size */
  89 #define CONFIG_SYS_MAXARGS      32              /* Max number of command args */
  90 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
  91                                                 /* Boot argument buffer size */
  92 #define CONFIG_AUTO_COMPLETE                    /* Command auto complete */
  93 #define CONFIG_CMDLINE_EDITING                  /* Command history etc */
  94
  95 /* Booting Linux */
  96 #define CONFIG_CMDLINE_TAG
  97 #define CONFIG_SETUP_MEMORY_TAGS
  98
  99 /*
 100  * Drivers
 101  */
 102
 103 /* APBH DMA */
 104 #define CONFIG_APBH_DMA
 105
 106 /* GPIO */
 107 #define CONFIG_MXS_GPIO
 108
 109 /*
 110  * DUART Serial Driver.
 111  * Conflicts with AUART driver which can be set by board.
 112  */
 113 #define CONFIG_PL011_SERIAL
 114 #define CONFIG_PL011_CLOCK              24000000
 115 #define CONFIG_PL01x_PORTS              { (void *)MXS_UARTDBG_BASE }
 116 #define CONFIG_CONS_INDEX               0
 117 /* Default baudrate can be overridden by board! */
 118 #ifndef CONFIG_BAUDRATE
 119 #define CONFIG_BAUDRATE                 115200
 120 #endif
 121
 122 /* FEC Ethernet on SoC */
 123 #ifdef CONFIG_FEC_MXC
 124 #define CONFIG_MII
 125 #ifndef CONFIG_ETHPRIME
 126 #define CONFIG_ETHPRIME                 "FEC0"
 127 #endif
 128 #ifndef CONFIG_FEC_XCV_TYPE
 129 #define CONFIG_FEC_XCV_TYPE             RMII
 130 #endif
 131 #endif
 132
 133 /* I2C */
 134 #ifdef CONFIG_CMD_I2C
 135 #define CONFIG_SYS_I2C
 136 #define CONFIG_SYS_I2C_MXS
 137 #define CONFIG_HARD_I2C
 138 #ifndef CONFIG_SYS_I2C_SPEED
 139 #define CONFIG_SYS_I2C_SPEED            400000
 140 #endif
 141 #endif
 142
 143 /* LCD */
 144 #ifdef CONFIG_VIDEO
 145 #define CONFIG_VIDEO_MXS
 146 #endif
 147
 148 /* MMC */
 149 #ifdef CONFIG_CMD_MMC
 150 #define CONFIG_GENERIC_MMC
 151 #define CONFIG_BOUNCE_BUFFER
 152 #endif
 153
 154 /* NAND */
 155 #ifdef CONFIG_CMD_NAND
 156 #define CONFIG_NAND_MXS
 157 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 158 #define CONFIG_SYS_NAND_BASE            0x60000000
 159 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 160 #endif
 161
 162 /* OCOTP */
 163 #ifdef CONFIG_CMD_FUSE
 164 #define CONFIG_MXS_OCOTP
 165 #endif
 166
 167 /* SPI */
 168 #ifdef CONFIG_CMD_SPI
 169 #define CONFIG_HARD_SPI
 170 #define CONFIG_MXS_SPI
 171 #define CONFIG_SPI_HALF_DUPLEX
 172 #endif
 173
 174 /* USB */
 175 #ifdef CONFIG_CMD_USB
 176 #define CONFIG_USB_EHCI
 177 #define CONFIG_USB_EHCI_MXS
 178 #define CONFIG_EHCI_IS_TDI
 179 #endif
 180
 181 #endif  /* __CONFIGS_MXS_H__ */