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1 /*
2 * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
3 *
4 * Configuation settings for the TI OMAP NetStar board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25 #ifndef __CONFIG_H
26 #define __CONFIG_H
27
28 #include <configs/omap1510.h>
29
30 /*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34 #define CONFIG_ARM925T 1 /* This is an arm925t CPU */
35 #define CONFIG_OMAP 1 /* in a TI OMAP core */
36 #define CONFIG_OMAP1510 1 /* which is in a 5910 */
37
38 /* Input clock of PLL */
39 #define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */
40 #define CONFIG_XTAL_FREQ 12000000
41
42 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43
44 #define CONFIG_MISC_INIT_R /* There is nothing to really init */
45 #define BOARD_LATE_INIT /* but we flash the LEDs here */
46
47 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS 1
49 #define CONFIG_INITRD_TAG 1
50
51 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
52 #define CONFIG_SYS_CONSOLE_INFO_QUIET
53
54 /*
55 * Physical Memory Map
56 */
57 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
58 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
59 #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
60 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
61
62 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
63 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
64
65 /*
66 * Environment settings
67 */
68 #define CONFIG_ENV_IS_IN_FLASH
69 #define CONFIG_ENV_ADDR 0x4000
70 #define CONFIG_ENV_SIZE (8 * 1024)
71 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
72 #define CONFIG_ENV_ADDR_REDUND 0x6000
73 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
74 #define CONFIG_ENV_OVERWRITE
75
76 /*
77 * Size of malloc() pool
78 */
79 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
80 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
81
82 /*
83 * The stack size is set up in start.S using the settings below
84 */
85 #define CONFIG_STACKSIZE (1 * 1024 * 1024) /* regular stack */
86
87 /*
88 * Hardware drivers
89 */
90 #define CONFIG_SYS_NS16550
91 #define CONFIG_SYS_NS16550_SERIAL
92 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
93 #define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
94 #define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
95
96 #define CONFIG_DRIVER_SMC91111
97 #define CONFIG_SMC91111_BASE 0x04000300
98
99 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
100 #define CONFIG_SYS_MAX_FLASH_BANKS 1
101 #define CONFIG_SYS_MAX_FLASH_SECT 19
102
103 #define CONFIG_SYS_FLASH_CFI
104 #define CONFIG_FLASH_CFI_DRIVER
105 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
106 #define CONFIG_FLASH_CFI_LEGACY
107 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
108
109 #define CONFIG_SYS_MAX_NAND_DEVICE 1
110 #define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23)
111 #define NAND_ALLOW_ERASE_ALL 1
112
113 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
114
115 #define CONFIG_HARD_I2C
116 #define CONFIG_SYS_I2C_SPEED 100000
117 #define CONFIG_SYS_I2C_SLAVE 1
118 #define CONFIG_DRIVER_OMAP1510_I2C
119
120 #define CONFIG_RTC_DS1307
121 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
122
123
124 #define CONFIG_CONS_INDEX 1
125 #define CONFIG_BAUDRATE 115200
126 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
127
128 /*#define CONFIG_SKIP_RELOCATE_UBOOT*/
129 /*#define CONFIG_SKIP_LOWLEVEL_INIT */
130
131 /*
132 * partitions (mtdparts command line support)
133 */
134 #define CONFIG_CMD_MTDPARTS
135 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
136 #define CONFIG_FLASH_CFI_MTD
137 #define MTDIDS_DEFAULT "nor0=omapflash.0,nand0=omapnand.0"
138 #define MTDPARTS_DEFAULT "mtdparts=" \
139 "omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
140 "omapnand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
141
142
143 /*
144 * Command line configuration.
145 */
146 #define CONFIG_CMD_BDI
147 #define CONFIG_CMD_BOOTD
148 #define CONFIG_CMD_DATE
149 #define CONFIG_CMD_DHCP
150 #define CONFIG_CMD_SAVEENV
151 #define CONFIG_CMD_FLASH
152 #define CONFIG_CMD_IMI
153 #define CONFIG_CMD_JFFS2
154 #define CONFIG_CMD_LOADB
155 #define CONFIG_CMD_MEMORY
156 #define CONFIG_CMD_NAND
157 #define CONFIG_CMD_NET
158 #define CONFIG_CMD_PING
159 #define CONFIG_CMD_RUN
160
161
162 #define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
163
164 /*
165 * BOOTP options
166 */
167 #define CONFIG_BOOTP_SUBNETMASK
168 #define CONFIG_BOOTP_GATEWAY
169 #define CONFIG_BOOTP_HOSTNAME
170 #define CONFIG_BOOTP_BOOTPATH
171
172 #define CONFIG_LOOPW
173
174 #define CONFIG_BOOTDELAY 3
175 #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
176 #undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
177 #define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
178 #define CONFIG_BOOTCOMMAND "run fboot"
179 #define CONFIG_PREBOOT "run setup"
180 #define CONFIG_EXTRA_ENV_SETTINGS \
181 "autostart=yes\0" \
182 "ospart=0\0" \
183 "setup=setenv bootargs console=ttyS0,$baudrate " \
184 "$mtdparts\0" \
185 "setpart=" \
186 "if test -n $swapos; then " \
187 "setenv swapos; saveenv; " \
188 "else " \
189 "if test $ospart -eq 0; then setenv ospart 1;" \
190 "else setenv ospart 0; fi; " \
191 "fi\0" \
192 "nfsargs=setenv bootargs $bootargs " \
193 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
194 "nfsroot=$rootpath root=/dev/nfs\0" \
195 "flashargs=run setpart;setenv bootargs $bootargs " \
196 "root=mtd:rootfs$ospart ro " \
197 "rootfstype=jffs2\0" \
198 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
199 "fboot=run flashargs;nboot kernel$ospart\0" \
200 "nboot=bootp;run nfsargs;tftp\0"
201
202 #if 0 /* feel free to disable for development */
203 #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
204 #define CONFIG_AUTOBOOT_PROMPT \
205 "\nNetStar PBX - boot in %d secs...\n", bootdelay
206 #define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */
207 #endif
208
209 /*
210 * Miscellaneous configurable options
211 */
212 #define CONFIG_SYS_LONGHELP /* undef to save memory */
213 #define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */
214 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
215 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
216 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
217 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
218
219 #define CONFIG_SYS_HUSH_PARSER
220 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
221 #define CONFIG_AUTO_COMPLETE
222
223 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
224 #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
225 (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
226
227 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
228
229 /* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
230 * This time is further subdivided by a local divisor.
231 */
232 #define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
233 #define CONFIG_SYS_PTV 7
234 #define CONFIG_SYS_HZ 1000
235
236 #define OMAP5910_DPLL_DIV 1
237 #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
238 (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
239
240 #define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
241 #define OMAP5910_LCD_DIV 2 /* CKL/4 */
242 #define OMAP5910_ARM_DIV 0 /* CKL/1 */
243 #define OMAP5910_DSP_DIV 0 /* CKL/1 */
244 #define OMAP5910_TC_DIV 1 /* CKL/2 */
245 #define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
246 #define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
247
248 #define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */
249 #define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
250 (OMAP5910_LCD_DIV << 2) | \
251 (OMAP5910_ARM_DIV << 4) | \
252 (OMAP5910_DSP_DIV << 6) | \
253 (OMAP5910_TC_DIV << 8) | \
254 (OMAP5910_DSP_MMU_DIV << 10) | \
255 (OMAP5910_ARM_TIM_SEL << 12))
256
257 #endif /* __CONFIG_H */