include/configs/ns9750dev.h

   1 /*
   2  * Copyright (C) 2004 by FS Forth-Systeme GmbH.
   3  * All rights reserved.
   4  * Markus Pietrek <mpietrek@fsforth.de>
   5  *
   6  * Configuation settings for the NetSilicon NS9750 DevBoard
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*
  31  * If we are developing, we might want to start armboot from ram
  32  * so we MUST NOT initialize critical regs like mem-timing ...
  33  */
  34 #define CONFIG_INIT_CRITICAL            /* undef for developing */
  35
  36 /*
  37  * High Level Configuration Options
  38  * (easy to change)
  39  */
  40 #define CONFIG_ARM926EJS        1       /* This is an ARM926EJS Core    */
  41 #define CONFIG_NS9750           1       /* in an NetSilicon NS9750 SoC     */
  42 #define CONFIG_NS9750DEV        1       /* on an NetSilicon NS9750 DevBoard  */
  43
  44 /* input clock of PLL */
  45 #define CONFIG_SYS_CLK_FREQ     324403200 /* Don't use PLL. SW11-4 off */
  46
  47 #define CPU_CLK_FREQ            (CONFIG_SYS_CLK_FREQ/2)
  48 #define AHB_CLK_FREQ            (CONFIG_SYS_CLK_FREQ/4)
  49 #define BBUS_CLK_FREQ           (CONFIG_SYS_CLK_FREQ/8)
  50
  51 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  52 /*@TODO #define CONFIG_STATUS_LED*/
  53 #define CONFIG_USE_IRQ
  54
  55 /*
  56  * Size of malloc() pool
  57  */
  58 #define CFG_MALLOC_LEN          (CFG_ENV_SIZE + 128*1024)
  59 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial
  60                                          * data */
  61
  62 /*
  63  * Hardware drivers
  64  */
  65 #define CFG_NS9750_UART                 1       /* use on-chip UART */
  66 #define CONFIG_DRIVER_NS9750_ETHERNET   1       /* use on-chip ethernet */
  67
  68 /*
  69  * select serial console configuration
  70  */
  71 #define CONFIG_CONS_INDEX          1            /* Port B */
  72
  73 /* allow to overwrite serial and ethaddr */
  74 #define CONFIG_ENV_OVERWRITE
  75
  76 #define CONFIG_BAUDRATE         38400
  77
  78 /***********************************************************
  79  * Command definition
  80  ***********************************************************/
  81 #if 0 /* @TODO */
  82 #define CONFIG_COMMANDS \
  83                         (CONFIG_CMD_DFL  | \
  84                         CFG_CMD_CACHE    | \
  85                         /*CFG_CMD_NAND   |*/ \
  86                         /*CFG_CMD_EEPROM |*/ \
  87                         /*CFG_CMD_I2C    |*/ \
  88                         /*CFG_CMD_USB    |*/ \
  89                         CFG_CMD_REGINFO  | \
  90                         CFG_CMD_DATE     | \
  91                         CFG_CMD_ELF)
  92 #else
  93 #define CONFIG_COMMANDS \
  94                         (CONFIG_CMD_BDI | \
  95                         CFG_CMD_NET | \
  96                         CFG_CMD_PING     | \
  97                         CFG_CMD_CONSOLE  | \
  98                         CFG_CMD_LOADB    | \
  99                         CFG_CMD_LOADS    | \
 100                         CFG_CMD_MEMORY)
 101 #endif
 102
 103 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 104 #include <cmd_confdefs.h>
 105
 106 #define CONFIG_BOOTDELAY        3
 107 /*#define CONFIG_BOOTARGS       "root=ramfs devfs=mount console=ttySA0,9600" */
 108
 109 #define CONFIG_ETHADDR          00:04:f3:ff:ff:fb /*@TODO unset */
 110 #define CONFIG_NETMASK          255.255.255.0
 111 #define CONFIG_IPADDR           192.168.42.30
 112 #define CONFIG_SERVERIP         192.168.42.1
 113
 114 /*#define CONFIG_BOOTFILE       "elinos-lart" */
 115 /*#define CONFIG_BOOTCOMMAND    "tftp; bootm" */
 116
 117 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 118 #define CONFIG_KGDB_BAUDRATE    115200          /* speed to run kgdb serial port */
 119 /* what's this ? it's not used anywhere */
 120 #define CONFIG_KGDB_SER_INDEX   1               /* which serial port to use */
 121 #endif
 122
 123 /*
 124  * Miscellaneous configurable options
 125  */
 126 #define CFG_LONGHELP                            /* undef to save memory         */
 127 #define CFG_PROMPT              "NS9750DEV # "  /* Monitor Command Prompt       */
 128 #define CFG_CBSIZE              256             /* Console I/O Buffer Size      */
 129 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 130 #define CFG_MAXARGS             16              /* max number of command args   */
 131 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 132
 133 #define CFG_MEMTEST_START       0x00000000      /* memtest works on     */
 134 #define CFG_MEMTEST_END         0x00780000      /* 7,5 MB in DRAM       */ /* @TODO */
 135
 136 #undef  CFG_CLKS_IN_HZ          /* everything, incl board info, in Hz */
 137
 138 #define CFG_LOAD_ADDR           0x00600000      /* default load address */ /* @TODO */
 139
 140 #define CFG_HZ                  (CPU_CLK_FREQ/64)
 141
 142 /* valid baudrates */
 143 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 144
 145 #define NS9750_ETH_PHY_ADDRESS  (0x0000)
 146
 147 /*-----------------------------------------------------------------------
 148  * Stack sizes
 149  *
 150  * The stack sizes are set up in start.S using the settings below
 151  */
 152 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 153 #ifdef CONFIG_USE_IRQ
 154 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 155 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 156 #endif
 157
 158 /*-----------------------------------------------------------------------
 159  * Physical Memory Map
 160  */
 161 /* TODO */
 162 #define CONFIG_NR_DRAM_BANKS    2          /* we have 1 bank of DRAM */
 163 #define PHYS_SDRAM_1            0x00000000 /* SDRAM Bank #1 */
 164 #define PHYS_SDRAM_1_SIZE       0x00800000 /* 8 MB */
 165 #define PHYS_SDRAM_2            0x10000000 /* SDRAM Bank #1 */
 166 #define PHYS_SDRAM_2_SIZE       0x00800000 /* 8 MB */
 167
 168 #define PHYS_FLASH_1            0x50000000 /* Flash Bank #1 */
 169
 170 #define CFG_FLASH_BASE          PHYS_FLASH_1
 171
 172 /*-----------------------------------------------------------------------
 173  * FLASH and environment organization
 174  */
 175
 176 /* @TODO*/
 177 #define CONFIG_AMD_LV400        1       /* uncomment this if you have a LV400 flash */
 178 #if 0
 179 #define CONFIG_AMD_LV800        1       /* uncomment this if you have a LV800 flash */
 180 #endif
 181
 182 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks */
 183 #ifdef CONFIG_AMD_LV800
 184 #define PHYS_FLASH_SIZE         0x00100000 /* 1MB */
 185 #define CFG_MAX_FLASH_SECT      (19)    /* max number of sectors on one chip */
 186 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
 187 #endif
 188 #ifdef CONFIG_AMD_LV400
 189 #define PHYS_FLASH_SIZE         0x00080000 /* 512KB */
 190 #define CFG_MAX_FLASH_SECT      (11)    /* max number of sectors on one chip */
 191 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x070000) /* addr of environment */
 192 #endif
 193
 194 /* timeout values are in ticks */
 195 #define CFG_FLASH_ERASE_TOUT    (5*CFG_HZ) /* Timeout for Flash Erase */
 196 #define CFG_FLASH_WRITE_TOUT    (5*CFG_HZ) /* Timeout for Flash Write */
 197
 198 /* @TODO */
 199 /*#define       CFG_ENV_IS_IN_FLASH     1*/
 200 #define CFG_ENV_IS_NOWHERE
 201 #define CFG_ENV_SIZE            0x10000 /* Total Size of Environment Sector */
 202
 203 #ifdef CONFIG_STATUS_LED
 204
 205 extern void __led_init(led_id_t mask, int state);
 206 extern void __led_toggle(led_id_t mask);
 207 extern void __led_set(led_id_t mask, int state);
 208
 209 #endif /* CONFIG_STATUS_LED */
 210
 211 #endif  /* __CONFIG_H */