include/configs/o2dnt-common.h

   1 /*
   2  *  Common configuration options for ifm camera boards
   3  *
   4  * (C) Copyright 2005
   5  * Sebastien Cazaux, ifm electronic gmbh
   6  *
   7  * (C) Copyright 2012
   8  * DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __O2D_CONFIG_H
  14 #define __O2D_CONFIG_H
  15
  16 /*
  17  * High Level Configuration Options
  18  */
  19 #define CONFIG_MPC5200
  20
  21 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* running at 33.000000MHz */
  22
  23 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
  24 #if defined(CONFIG_CMD_KGDB)
  25 /* log base 2 of the above value */
  26 #define CONFIG_SYS_CACHELINE_SHIFT      5
  27 #endif
  28
  29 /*
  30 #define CONFIG_POST     (CONFIG_SYS_POST_MEMORY | \
  31                          CONFIG_SYS_POST_I2C)
  32 */
  33
  34 #ifdef CONFIG_POST
  35 /* preserve space for the post_word at end of on-chip SRAM */
  36 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
  37 #endif
  38
  39 /*
  40  * Serial console configuration
  41  */
  42 #define CONFIG_PSC_CONSOLE      5       /* console is on PSC5 */
  43 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  44 #define CONFIG_SYS_BAUDRATE_TABLE \
  45         { 9600, 19200, 38400, 57600, 115200, 230400 }
  46
  47 /*
  48  * PCI Mapping:
  49  * 0x40000000 - 0x4fffffff - PCI Memory
  50  * 0x50000000 - 0x50ffffff - PCI IO Space
  51  */
  52
  53 #define CONFIG_PCI_MEM_BUS      0x40000000
  54 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  55 #define CONFIG_PCI_MEM_SIZE     0x10000000
  56
  57 #define CONFIG_PCI_IO_BUS       0x50000000
  58 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  59 #define CONFIG_PCI_IO_SIZE      0x01000000
  60
  61 #define CONFIG_SYS_XLB_PIPELINING       1
  62
  63 /* Partitions */
  64
  65 #define CONFIG_TIMESTAMP        /* Print image info with timestamp */
  66
  67 #define CONFIG_SYS_ALT_MEMTEST  /* Much more complex memory test */
  68
  69 /*
  70  * Supported commands
  71  */
  72 #define CONFIG_CMD_EEPROM
  73 #ifdef CONFIG_PCI
  74 #define CONFIG_CMD_PCI
  75 #endif
  76 #ifdef CONFIG_POST
  77 #define CONFIG_CMD_DIAG
  78 #endif
  79
  80 #if (CONFIG_SYS_TEXT_BASE == 0xFC000000) || (CONFIG_SYS_TEXT_BASE == 0xFF000000)
  81 /* Boot low with 16 or 32 MB Flash */
  82 #define CONFIG_SYS_LOWBOOT      1
  83 #elif (CONFIG_SYS_TEXT_BASE != 0x00100000)
  84 #error "CONFIG_SYS_TEXT_BASE value is invalid"
  85 #endif
  86
  87
  88 #define CONFIG_PREBOOT  "run master"
  89
  90 #undef  CONFIG_BOOTARGS
  91
  92 #if !defined(CONSOLE_DEV)
  93 #define CONSOLE_DEV     "ttyPSC1"
  94 #endif
  95
  96 /*
  97  * Default environment for booting old and new kernel versions
  98  */
  99 #define CONFIG_IFM_DEFAULT_ENV_OLD                                      \
 100         "flash_self_old=run ramargs addip addmem;"                      \
 101                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 102         "flash_nfs_old=run nfsargs addip addmem;"                       \
 103                 "bootm ${kernel_addr}\0"                                \
 104         "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};"                \
 105                 "run nfsargs addip addmem;"                             \
 106                 "bootm ${kernel_addr_r}\0"
 107
 108 #define CONFIG_IFM_DEFAULT_ENV_NEW                                      \
 109         "fdt_addr_r=900000\0"                                           \
 110         "fdt_file="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME".dtb\0"        \
 111         "flash_self=run ramargs addip addtty addmisc;"                  \
 112                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
 113         "flash_nfs=run nfsargs addip addtty addmisc;"                   \
 114                 "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
 115         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 116                 "tftp ${fdt_addr_r} ${fdt_file}; "                      \
 117                 "run nfsargs addip addtty addmisc;"                     \
 118                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
 119
 120 #define CONFIG_IFM_DEFAULT_ENV_SETTINGS                                 \
 121         "IOpin=0x64\0"                                                  \
 122         "addip=setenv bootargs ${bootargs} "                            \
 123                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 124                 ":${hostname}:${netdev}:off panic=1\0"                  \
 125         "addmem=setenv bootargs ${bootargs} ${memlimit}\0"              \
 126         "addmisc=sete bootargs ${bootargs} ${miscargs}\0"               \
 127         "addtty=sete bootargs ${bootargs} console="                     \
 128                 CONSOLE_DEV ",${baudrate}\0"                    \
 129         "bootfile="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0" \
 130         "kernel_addr_r=600000\0"                                        \
 131         "initrd_high=0x03e00000\0"                                      \
 132         "memlimit=mem="CONFIG_BOARD_MEM_LIMIT"M\0"                      \
 133         "memtest=mtest 0x00100000 "__stringify(CONFIG_SYS_MEMTEST_END)" 0 1\0" \
 134         "netdev=eth0\0"                                                 \
 135         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 136                 "nfsroot=${serverip}:${rootpath}\0"                     \
 137         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 138         "linuxname="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0"\
 139         "progLinux=tftp 200000 ${linuxname};erase ${linbot} ${lintop};" \
 140                 "cp.b ${fileaddr} ${linbot} ${filesize}\0"              \
 141         "ramname="CONFIG_BOARD_NAME"/uRamdisk_"CONFIG_BOARD_NAME"_act\0"\
 142         "progRam=tftp 200000 ${ramname};erase ${rambot} ${ramtop};"     \
 143                 "cp.b ${fileaddr} ${rambot} ${filesize}\0"              \
 144         "jffname="CONFIG_BOARD_NAME"/uJFFS2_"CONFIG_BOARD_NAME"_act\0"  \
 145         "progJff=tftp 200000 ${jffname};erase ${jffbot} ${jfftop};"     \
 146                 "cp.b ${fileaddr} ${jffbot} ${filesize}\0"              \
 147         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 148         "uboname=" CONFIG_BOARD_NAME                                    \
 149                 "/u-boot.bin_" CONFIG_BOARD_NAME "_act\0"               \
 150         "progubo=tftp 200000 ${uboname};"                               \
 151                 "protect off ${ubobot} ${ubotop};"                      \
 152                 "erase ${ubobot} ${ubotop};"                            \
 153                 "cp.b ${fileaddr} ${ubobot} ${filesize}\0"              \
 154         "unlock=yes\0"                                                  \
 155         "post=echo !!! "CONFIG_BOARD_NAME" POWER ON SELF TEST !!!;"     \
 156                 "setenv bootdelay 1;"                                   \
 157                 "crc32 "__stringify(CONFIG_SYS_TEXT_BASE)" "            \
 158                         BOARD_POST_CRC32_END";"                         \
 159                 "setenv bootcmd "CONFIG_BOARD_BOOTCMD";saveenv;reset\0"
 160
 161 #define CONFIG_BOOTCOMMAND      "run post"
 162
 163 /*
 164  * IPB Bus clocking configuration.
 165  */
 166 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
 167
 168 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
 169 /*
 170  * PCI Bus clocking configuration
 171  *
 172  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
 173  * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
 174  * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
 175  */
 176 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2    /* define for 66MHz speed */
 177 #endif
 178
 179 /*
 180  * I2C configuration
 181  */
 182 #define CONFIG_HARD_I2C                 1       /* I2C with hardware support */
 183 #define CONFIG_SYS_I2C_MODULE           1       /* Select I2C module #1 or #2 */
 184 #define CONFIG_SYS_I2C_SPEED            100000  /* 100 kHz */
 185 #define CONFIG_SYS_I2C_SLAVE            0x7F
 186
 187 /*
 188  * EEPROM configuration:
 189  *
 190  * O2DNT board is equiped with Ramtron FRAM device FM24CL16
 191  * 16 Kib Ferroelectric Nonvolatile serial RAM memory
 192  * organized as 2048 x 8 bits and addressable as eight I2C devices
 193  * 0x50 ... 0x57 each 256 bytes in size
 194  *
 195  */
 196 #define CONFIG_SYS_I2C_FRAM
 197 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
 198 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 199 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
 200 /*
 201  * There is no write delay with FRAM, write operations are performed at bus
 202  * speed. Thus, no status polling or write delay is needed.
 203  */
 204
 205 /*
 206  * Flash configuration
 207  */
 208 #define CONFIG_SYS_FLASH_CFI            1
 209 #define CONFIG_FLASH_CFI_DRIVER         1
 210 #define CONFIG_FLASH_16BIT
 211 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
 212 #define CONFIG_SYS_FLASH_CFI_AMD_RESET
 213 #define CONFIG_SYS_FLASH_EMPTY_INFO
 214
 215 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks */
 216 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 217 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Erase Timeout (in ms) */
 218 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Write Timeout (in ms) */
 219 /* Timeout for Flash Clear Lock Bits (in ms) */
 220 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    10000
 221 /* "Real" (hardware) sectors protection */
 222 #define CONFIG_SYS_FLASH_PROTECTION
 223
 224 /*
 225  * Environment settings
 226  */
 227 #define CONFIG_ENV_IS_IN_FLASH  1
 228 #define CONFIG_ENV_SIZE         0x20000
 229 #define CONFIG_ENV_SECT_SIZE    0x20000
 230 #define CONFIG_ENV_OVERWRITE    1
 231 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00040000)
 232
 233 /*
 234  * Memory map
 235  */
 236 #define CONFIG_SYS_MBAR         0xF0000000
 237 #define CONFIG_SYS_SDRAM_BASE   0x00000000
 238 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 239
 240 /* Use SRAM until RAM will be available */
 241 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 242 #ifdef CONFIG_POST
 243 /* preserve space for the post_word at end of on-chip SRAM */
 244 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_POST_SIZE
 245 #else
 246 /* End of used area in DPRAM */
 247 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
 248 #endif
 249
 250 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 251                                          GENERATED_GBL_DATA_SIZE)
 252 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 253
 254 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
 255 #define CONFIG_SYS_MONITOR_LEN          (192 << 10) /* 192 kB for Monitor */
 256 #define CONFIG_SYS_MALLOC_LEN           (128 << 10) /* 128 kB for malloc() */
 257 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)   /* Initial map for Linux */
 258
 259 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 260 #define CONFIG_SYS_RAMBOOT              1
 261 #endif
 262
 263 /*
 264  * Ethernet configuration
 265  */
 266 #define CONFIG_MPC5xxx_FEC
 267 #define CONFIG_MPC5xxx_FEC_MII100
 268 #define CONFIG_PHY_ADDR                 0x00
 269 #define CONFIG_RESET_PHY_R
 270
 271 /*
 272  * GPIO configuration
 273  */
 274 #define CONFIG_SYS_GPIO_DATADIR         0x00000064 /* PSC1_2, PSC2_1,2 output */
 275 #define CONFIG_SYS_GPIO_OPENDRAIN       0x00000000 /* No open drain */
 276 #define CONFIG_SYS_GPIO_DATAVALUE       0x00000000 /* PSC1_1 to 1, rest to 0 */
 277 #define CONFIG_SYS_GPIO_ENABLE          0x00000064 /* PSC1_2, PSC2_1,2 enable */
 278
 279 /*
 280  * Miscellaneous configurable options
 281  */
 282 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 283 #define CONFIG_CMDLINE_EDITING
 284
 285 #if defined(CONFIG_CMD_KGDB)
 286 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size  */
 287 #else
 288 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size  */
 289 #endif
 290 /* Print Buffer Size */
 291 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 292                                          sizeof(CONFIG_SYS_PROMPT) + 16)
 293 /* max number of command args */
 294 #define CONFIG_SYS_MAXARGS              16
 295 /* Boot Argument Buffer Size */
 296 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 297
 298 /* default load address */
 299 #define CONFIG_SYS_LOAD_ADDR            0x100000
 300
 301 /* decrementer freq: 1 ms ticks */
 302
 303 /*
 304  * Various low-level settings
 305  */
 306 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 307 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 308
 309 #define CONFIG_SYS_BOOTCS_START         CONFIG_SYS_FLASH_BASE
 310 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 311 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 312 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 313
 314 #define CONFIG_BOARD_EARLY_INIT_R
 315
 316 #define CONFIG_SYS_CS_BURST             0x00000000
 317 #define CONFIG_SYS_CS_DEADCYCLE         0x33333333
 318
 319 /*
 320  * DT support
 321  */
 322 #define OF_CPU                  "PowerPC,5200@0"
 323 #define OF_SOC                  "soc5200@f0000000"
 324 #define OF_TBCLK                (bd->bi_busfreq / 4)
 325
 326 #endif /* __O2D_CONFIG_H */