include/configs/o2dnt-common.h

   1 /*
   2  *  Common configuration options for ifm camera boards
   3  *
   4  * (C) Copyright 2005
   5  * Sebastien Cazaux, ifm electronic gmbh
   6  *
   7  * (C) Copyright 2012
   8  * DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #ifndef __O2D_CONFIG_H
  30 #define __O2D_CONFIG_H
  31
  32 /*
  33  * High Level Configuration Options
  34  */
  35 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  36 #define CONFIG_MPC5200
  37
  38 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* running at 33.000000MHz */
  39
  40 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
  41 #if defined(CONFIG_CMD_KGDB)
  42 /* log base 2 of the above value */
  43 #define CONFIG_SYS_CACHELINE_SHIFT      5
  44 #endif
  45
  46 /*
  47 #define CONFIG_POST     (CONFIG_SYS_POST_MEMORY | \
  48                          CONFIG_SYS_POST_I2C)
  49 */
  50
  51 #ifdef CONFIG_POST
  52 /* preserve space for the post_word at end of on-chip SRAM */
  53 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
  54 #endif
  55
  56 /*
  57  * Serial console configuration
  58  */
  59 #define CONFIG_PSC_CONSOLE      5       /* console is on PSC5 */
  60 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  61 #define CONFIG_SYS_BAUDRATE_TABLE \
  62         { 9600, 19200, 38400, 57600, 115200, 230400 }
  63
  64 /*
  65  * PCI Mapping:
  66  * 0x40000000 - 0x4fffffff - PCI Memory
  67  * 0x50000000 - 0x50ffffff - PCI IO Space
  68  */
  69 #undef CONFIG_PCI
  70 #define CONFIG_PCI_PNP          1
  71
  72 #define CONFIG_PCI_MEM_BUS      0x40000000
  73 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  74 #define CONFIG_PCI_MEM_SIZE     0x10000000
  75
  76 #define CONFIG_PCI_IO_BUS       0x50000000
  77 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  78 #define CONFIG_PCI_IO_SIZE      0x01000000
  79
  80 #define CONFIG_SYS_XLB_PIPELINING       1
  81
  82 /* Partitions */
  83 #define CONFIG_MAC_PARTITION
  84 #define CONFIG_DOS_PARTITION
  85 #define CONFIG_ISO_PARTITION
  86
  87 #define CONFIG_TIMESTAMP        /* Print image info with timestamp */
  88
  89 #define CONFIG_SYS_ALT_MEMTEST  /* Much more complex memory test */
  90
  91 /*
  92  * Supported commands
  93  */
  94 #include <config_cmd_default.h>
  95
  96 #define CONFIG_CMD_EEPROM
  97 #define CONFIG_CMD_FAT
  98 #define CONFIG_CMD_I2C
  99 #define CONFIG_CMD_MII
 100 #define CONFIG_CMD_PING
 101 #define CONFIG_CMD_DHCP
 102 #ifdef CONFIG_PCI
 103 #define CONFIG_CMD_PCI
 104 #endif
 105 #ifdef CONFIG_POST
 106 #define CONFIG_CMD_DIAG
 107 #endif
 108
 109 #if (CONFIG_SYS_TEXT_BASE == 0xFC000000) || (CONFIG_SYS_TEXT_BASE == 0xFF000000)
 110 /* Boot low with 16 or 32 MB Flash */
 111 #define CONFIG_SYS_LOWBOOT      1
 112 #elif (CONFIG_SYS_TEXT_BASE != 0x00100000)
 113 #error "CONFIG_SYS_TEXT_BASE value is invalid"
 114 #endif
 115
 116 /*
 117  * Autobooting
 118  * Be selective on what keys can delay or stop the autoboot process
 119  * To stop use: "++++++++++"
 120  */
 121 #define CONFIG_AUTOBOOT_KEYED
 122 #define CONFIG_AUTOBOOT_PROMPT  "Autobooting in %d seconds, " \
 123                                 "press password to stop\n", bootdelay
 124 #define CONFIG_AUTOBOOT_STOP_STR        "++++++++++"
 125 #undef CONFIG_AUTOBOOT_DELAY_STR
 126 #define DEBUG_BOOTKEYS          0
 127
 128 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
 129
 130 #define CONFIG_PREBOOT  "run master"
 131
 132 #undef  CONFIG_BOOTARGS
 133
 134 #define xstr(s) str(s)
 135 #define str(s)  #s
 136
 137 #if !defined(CONFIG_CONSOLE_DEV)
 138 #define CONFIG_CONSOLE_DEV      "ttyPSC1"
 139 #endif
 140
 141 /*
 142  * Default environment for booting old and new kernel versions
 143  */
 144 #define CONFIG_IFM_DEFAULT_ENV_OLD                                      \
 145         "flash_self_old=run ramargs addip addmem;"                      \
 146                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 147         "flash_nfs_old=run nfsargs addip addmem;"                       \
 148                 "bootm ${kernel_addr}\0"                                \
 149         "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};"                \
 150                 "run nfsargs addip addmem;"                             \
 151                 "bootm ${kernel_addr_r}\0"
 152
 153 #define CONFIG_IFM_DEFAULT_ENV_NEW                                      \
 154         "fdt_addr_r=900000\0"                                           \
 155         "fdt_file="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME".dtb\0"        \
 156         "flash_self=run ramargs addip addtty addmisc;"                  \
 157                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
 158         "flash_nfs=run nfsargs addip addtty addmisc;"                   \
 159                 "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
 160         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 161                 "tftp ${fdt_addr_r} ${fdt_file}; "                      \
 162                 "run nfsargs addip addtty addmisc;"                     \
 163                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
 164
 165 #define CONFIG_IFM_DEFAULT_ENV_SETTINGS                                 \
 166         "IOpin=0x64\0"                                                  \
 167         "addip=setenv bootargs ${bootargs} "                            \
 168                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 169                 ":${hostname}:${netdev}:off panic=1\0"                  \
 170         "addmem=setenv bootargs ${bootargs} ${memlimit}\0"              \
 171         "addmisc=sete bootargs ${bootargs} ${miscargs}\0"               \
 172         "addtty=sete bootargs ${bootargs} console="                     \
 173                 CONFIG_CONSOLE_DEV ",${baudrate}\0"                     \
 174         "bootfile="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0" \
 175         "kernel_addr_r=600000\0"                                        \
 176         "initrd_high=0x03e00000\0"                                      \
 177         "memlimit=mem="CONFIG_BOARD_MEM_LIMIT"M\0"                      \
 178         "memtest=mtest 0x00100000 "xstr(CONFIG_SYS_MEMTEST_END)" 0 1\0" \
 179         "netdev=eth0\0"                                                 \
 180         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 181                 "nfsroot=${serverip}:${rootpath}\0"                     \
 182         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 183         "linuxname="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0"\
 184         "progLinux=tftp 200000 ${linuxname};erase ${linbot} ${lintop};" \
 185                 "cp.b ${fileaddr} ${linbot} ${filesize}\0"              \
 186         "ramname="CONFIG_BOARD_NAME"/uRamdisk_"CONFIG_BOARD_NAME"_act\0"\
 187         "progRam=tftp 200000 ${ramname};erase ${rambot} ${ramtop};"     \
 188                 "cp.b ${fileaddr} ${rambot} ${filesize}\0"              \
 189         "jffname="CONFIG_BOARD_NAME"/uJFFS2_"CONFIG_BOARD_NAME"_act\0"  \
 190         "progJff=tftp 200000 ${jffname};erase ${jffbot} ${jfftop};"     \
 191                 "cp.b ${fileaddr} ${jffbot} ${filesize}\0"              \
 192         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 193         "uboname=" CONFIG_BOARD_NAME                                    \
 194                 "/u-boot.bin_" CONFIG_BOARD_NAME "_act\0"               \
 195         "progubo=tftp 200000 ${uboname};"                               \
 196                 "protect off ${ubobot} ${ubotop};"                      \
 197                 "erase ${ubobot} ${ubotop};"                            \
 198                 "cp.b ${fileaddr} ${ubobot} ${filesize}\0"              \
 199         "unlock=yes\0"                                                  \
 200         "post=echo !!! "CONFIG_BOARD_NAME" POWER ON SELF TEST !!!;"     \
 201                 "setenv bootdelay 1;"                                   \
 202                 "crc32 "xstr(CONFIG_SYS_TEXT_BASE)" "                   \
 203                         BOARD_POST_CRC32_END";"                         \
 204                 "setenv bootcmd "CONFIG_BOARD_BOOTCMD";saveenv;reset\0"
 205
 206 #define CONFIG_BOOTCOMMAND      "run post"
 207
 208 /*
 209  * IPB Bus clocking configuration.
 210  */
 211 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
 212
 213 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
 214 /*
 215  * PCI Bus clocking configuration
 216  *
 217  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
 218  * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
 219  * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
 220  */
 221 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2    /* define for 66MHz speed */
 222 #endif
 223
 224 /*
 225  * I2C configuration
 226  */
 227 #define CONFIG_HARD_I2C                 1       /* I2C with hardware support */
 228 #define CONFIG_SYS_I2C_MODULE           1       /* Select I2C module #1 or #2 */
 229 #define CONFIG_SYS_I2C_SPEED            100000  /* 100 kHz */
 230 #define CONFIG_SYS_I2C_SLAVE            0x7F
 231
 232 /*
 233  * EEPROM configuration:
 234  *
 235  * O2DNT board is equiped with Ramtron FRAM device FM24CL16
 236  * 16 Kib Ferroelectric Nonvolatile serial RAM memory
 237  * organized as 2048 x 8 bits and addressable as eight I2C devices
 238  * 0x50 ... 0x57 each 256 bytes in size
 239  *
 240  */
 241 #define CONFIG_SYS_I2C_FRAM
 242 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
 243 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 244 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
 245 /*
 246  * There is no write delay with FRAM, write operations are performed at bus
 247  * speed. Thus, no status polling or write delay is needed.
 248  */
 249
 250 /*
 251  * Flash configuration
 252  */
 253 #define CONFIG_SYS_FLASH_CFI            1
 254 #define CONFIG_FLASH_CFI_DRIVER         1
 255 #define CONFIG_FLASH_16BIT
 256 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
 257 #define CONFIG_SYS_FLASH_CFI_AMD_RESET
 258 #define CONFIG_SYS_FLASH_EMPTY_INFO
 259
 260 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks */
 261 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 262 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Erase Timeout (in ms) */
 263 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Write Timeout (in ms) */
 264 /* Timeout for Flash Clear Lock Bits (in ms) */
 265 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    10000
 266 /* "Real" (hardware) sectors protection */
 267 #define CONFIG_SYS_FLASH_PROTECTION
 268
 269 /*
 270  * Environment settings
 271  */
 272 #define CONFIG_ENV_IS_IN_FLASH  1
 273 #define CONFIG_ENV_SIZE         0x20000
 274 #define CONFIG_ENV_SECT_SIZE    0x20000
 275 #define CONFIG_ENV_OVERWRITE    1
 276 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00040000)
 277
 278 /*
 279  * Memory map
 280  */
 281 #define CONFIG_SYS_MBAR         0xF0000000
 282 #define CONFIG_SYS_SDRAM_BASE   0x00000000
 283 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 284
 285 /* Use SRAM until RAM will be available */
 286 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 287 #ifdef CONFIG_POST
 288 /* preserve space for the post_word at end of on-chip SRAM */
 289 #define CONFIG_SYS_INIT_RAM_END         MPC5XXX_SRAM_POST_SIZE
 290 #else
 291 /* End of used area in DPRAM */
 292 #define CONFIG_SYS_INIT_RAM_END         MPC5XXX_SRAM_SIZE
 293 #endif
 294
 295 /* size in bytes reserved for initial data */
 296 #define CONFIG_SYS_GBL_DATA_SIZE        128
 297 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - \
 298                                          CONFIG_SYS_GBL_DATA_SIZE)
 299 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 300
 301 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
 302 #define CONFIG_SYS_MONITOR_LEN          (192 << 10) /* 192 kB for Monitor */
 303 #define CONFIG_SYS_MALLOC_LEN           (128 << 10) /* 128 kB for malloc() */
 304 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)   /* Initial map for Linux */
 305
 306 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 307 #define CONFIG_SYS_RAMBOOT              1
 308 #endif
 309
 310 /*
 311  * Ethernet configuration
 312  */
 313 #define CONFIG_MPC5xxx_FEC
 314 #define CONFIG_MPC5xxx_FEC_MII100
 315 #define CONFIG_PHY_ADDR                 0x00
 316 #define CONFIG_RESET_PHY_R
 317
 318 /*
 319  * GPIO configuration
 320  */
 321 #define CONFIG_SYS_GPIO_DATADIR         0x00000064 /* PSC1_2, PSC2_1,2 output */
 322 #define CONFIG_SYS_GPIO_OPENDRAIN       0x00000000 /* No open drain */
 323 #define CONFIG_SYS_GPIO_DATAVALUE       0x00000000 /* PSC1_1 to 1, rest to 0 */
 324 #define CONFIG_SYS_GPIO_ENABLE          0x00000064 /* PSC1_2, PSC2_1,2 enable */
 325
 326 /*
 327  * Miscellaneous configurable options
 328  */
 329 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 330 #define CONFIG_SYS_PROMPT               "=> "   /* Monitor Command Prompt   */
 331 #define CONFIG_CMDLINE_EDITING
 332 #define CONFIG_SYS_HUSH_PARSER
 333
 334 #if defined(CONFIG_CMD_KGDB)
 335 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size  */
 336 #else
 337 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size  */
 338 #endif
 339 /* Print Buffer Size */
 340 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 341                                          sizeof(CONFIG_SYS_PROMPT) + 16)
 342 /* max number of command args */
 343 #define CONFIG_SYS_MAXARGS              16
 344 /* Boot Argument Buffer Size */
 345 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 346
 347 /* default load address */
 348 #define CONFIG_SYS_LOAD_ADDR            0x100000
 349
 350 /* decrementer freq: 1 ms ticks */
 351 #define CONFIG_SYS_HZ                   1000
 352
 353 /*
 354  * Various low-level settings
 355  */
 356 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 357 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 358
 359 #define CONFIG_SYS_BOOTCS_START         CONFIG_SYS_FLASH_BASE
 360 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 361 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 362 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 363
 364 #define CONFIG_BOARD_EARLY_INIT_R
 365
 366 #define CONFIG_SYS_CS_BURST             0x00000000
 367 #define CONFIG_SYS_CS_DEADCYCLE         0x33333333
 368
 369 /*
 370  * DT support
 371  */
 372 #define CONFIG_OF_LIBFDT        1
 373 #define CONFIG_OF_BOARD_SETUP   1
 374
 375 #define OF_CPU                  "PowerPC,5200@0"
 376 #define OF_SOC                  "soc5200@f0000000"
 377 #define OF_TBCLK                (bd->bi_busfreq / 4)
 378
 379 #endif /* __O2D_CONFIG_H */