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1 /*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 /*
14 * High Level Configuration Options
15 * (easy to change)
16 */
17 #define CONFIG_ARM925T 1 /* This is an arm925t CPU */
18 #define CONFIG_OMAP 1 /* in a TI OMAP core */
19 #define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */
20 #define CONFIG_INNOVATOROMAP1510 1 /* a Innovator Board */
21
22 /* input clock of PLL */
23 #define CONFIG_SYS_CLK_FREQ 12000000 /* the OMAP1510 Innovator has 12MHz input clock */
24
25 #define CONFIG_MISC_INIT_R
26
27 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
28 #define CONFIG_SETUP_MEMORY_TAGS 1
29 #define CONFIG_INITRD_TAG 1
30
31 /*
32 * Size of malloc() pool
33 */
34 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
35
36 /*
37 * Hardware drivers
38 */
39 /*
40 #define CONFIG_DRIVER_SMC9196
41 #define CONFIG_SMC9196_BASE 0x08000300
42 #define CONFIG_SMC9196_EXT_PHY
43 */
44 #define CONFIG_LAN91C96
45 #define CONFIG_LAN91C96_BASE 0x08000300
46 #define CONFIG_LAN91C96_EXT_PHY
47
48 /*
49 * NS16550 Configuration
50 */
51 #define CONFIG_SYS_NS16550
52 #define CONFIG_SYS_NS16550_SERIAL
53 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
54 #define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
55 #define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
56
57 /*
58 * select serial console configuration
59 */
60 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1510 Innovator */
61
62 /* allow to overwrite serial and ethaddr */
63 #define CONFIG_ENV_OVERWRITE
64
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_CONS_INDEX 1
67 #define CONFIG_BAUDRATE 115200
68
69 /*
70 * Command line configuration.
71 */
72 #include <config_cmd_default.h>
73
74 #define CONFIG_CMD_DHCP
75
76
77 /*
78 * BOOTP options
79 */
80 #define CONFIG_BOOTP_SUBNETMASK
81 #define CONFIG_BOOTP_GATEWAY
82 #define CONFIG_BOOTP_HOSTNAME
83 #define CONFIG_BOOTP_BOOTPATH
84
85
86 #include <configs/omap1510.h>
87
88 #define CONFIG_BOOTDELAY 3
89 #define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=bootp"
90 #define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
91 #define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
92
93 #if defined(CONFIG_CMD_KGDB)
94 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
95 /* what's this ? it's not used anywhere */
96 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
97 #endif
98
99 /*
100 * Miscellaneous configurable options
101 */
102 #define CONFIG_SYS_LONGHELP /* undef to save memory */
103 #define CONFIG_SYS_PROMPT "OMAP1510 Innovator # " /* Monitor Command Prompt */
104 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
105 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
106 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
107 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
108
109 #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
110 #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
111
112 #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
113
114 /* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
115 * This time is further subdivided by a local divisor.
116 */
117 #define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */
118 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
119 #define CONFIG_SYS_HZ 1000
120
121 /*-----------------------------------------------------------------------
122 * Physical Memory Map
123 */
124 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
125 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
126 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
127
128 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
129
130 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
131
132 #define PHYS_SRAM 0x20000000
133
134 /*-----------------------------------------------------------------------
135 * FLASH and environment organization
136 */
137 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
138 #define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
139 #define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */
140 #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
141 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE)
142 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
143 #define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
144 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE }
145
146 /*-----------------------------------------------------------------------
147 * FLASH driver setup
148 */
149 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
150 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
151 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
152 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
153
154 /* timeout values are in ticks */
155 #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
156 #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
157
158 #define CONFIG_ENV_IS_IN_FLASH 1
159 #define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE /* Total Size of Environment Sector */
160 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
161 #define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */
162
163 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
164 #define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
165
166 #endif /* __CONFIG_H */