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1 /*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * Configuration settings for the TI OMAP3530 Beagle board.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14
15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
16
17 /*
18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
19 * 64 bytes before this address should be set aside for u-boot.img's
20 * header. That is 0x800FFFC0--0x80100000 should not be used for any
21 * other needs. We use this rather than the inherited defines from
22 * ti_armv7_common.h for backwards compatibility.
23 */
24 #define CONFIG_SYS_TEXT_BASE 0x80100000
25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
29
30 #include <configs/ti_omap3_common.h>
31
32 #define CONFIG_MISC_INIT_R
33
34 #define CONFIG_REVISION_TAG 1
35 #define CONFIG_ENV_OVERWRITE
36
37 /* Status LED */
38
39 /* Enable Multi Bus support for I2C */
40 #define CONFIG_I2C_MULTI_BUS 1
41
42 /* Probe all devices */
43 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
44
45 /* USB */
46 #define CONFIG_USB_MUSB_OMAP2PLUS
47 #define CONFIG_USB_MUSB_PIO_ONLY
48 #define CONFIG_TWL4030_USB 1
49 #define CONFIG_USB_ETHER
50 #define CONFIG_USB_ETHER_RNDIS
51 #define CONFIG_USB_FUNCTION_FASTBOOT
52 #define CONFIG_CMD_FASTBOOT
53 #define CONFIG_ANDROID_BOOT_IMAGE
54 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
55 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
56
57 /* USB EHCI */
58
59 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
60
61 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
62 #define CONFIG_USB_HOST_ETHER
63 #define CONFIG_USB_ETHER_ASIX
64 #define CONFIG_USB_ETHER_MCS7830
65 #define CONFIG_USB_ETHER_SMSC95XX
66
67 /* commands to include */
68
69 #define MTDIDS_DEFAULT "nand0=nand"
70 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
71 "1920k(u-boot),128k(u-boot-env),"\
72 "4m(kernel),-(fs)"
73
74 #define CONFIG_CMD_NAND /* NAND support */
75
76 #define CONFIG_VIDEO_OMAP3 /* DSS Support */
77
78 /*
79 * TWL4030
80 */
81 #define CONFIG_TWL4030_LED 1
82
83 /*
84 * Board NAND Info.
85 */
86 #define CONFIG_NAND_OMAP_GPMC
87 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
88 /* devices */
89
90 #define BOOT_TARGET_DEVICES(func) \
91 func(MMC, mmc, 0)
92
93 #define CONFIG_BOOTCOMMAND \
94 "run findfdt; " \
95 "run distro_bootcmd; " \
96 "mmc dev ${mmcdev}; if mmc rescan; then " \
97 "if run userbutton; then " \
98 "setenv bootenv uEnv.txt;" \
99 "else " \
100 "setenv bootenv user.txt;" \
101 "fi;" \
102 "echo SD/MMC found on device ${mmcdev};" \
103 "if run loadbootenv; then " \
104 "echo Loaded environment from ${bootenv};" \
105 "run importbootenv;" \
106 "fi;" \
107 "if test -n $uenvcmd; then " \
108 "echo Running uenvcmd ...;" \
109 "run uenvcmd;" \
110 "fi;" \
111 "if run loadbootscript; then " \
112 "run bootscript; " \
113 "else " \
114 "if run loadimage; then " \
115 "run mmcboot;" \
116 "fi;" \
117 "fi; " \
118 "fi;" \
119 "run nandboot;" \
120 "setenv bootfile zImage;" \
121 "if run loadimage; then " \
122 "run loadfdt;" \
123 "run mmcbootz; " \
124 "fi; " \
125
126 #include <config_distro_bootcmd.h>
127
128 #define CONFIG_EXTRA_ENV_SETTINGS \
129 "loadaddr=0x80200000\0" \
130 "kernel_addr_r=0x80200000\0" \
131 "rdaddr=0x81000000\0" \
132 "initrd_addr_r=0x81000000\0" \
133 "fdt_high=0xffffffff\0" \
134 "fdtaddr=0x80f80000\0" \
135 "fdt_addr_r=0x80f80000\0" \
136 "usbtty=cdc_acm\0" \
137 "bootfile=uImage\0" \
138 "ramdisk=ramdisk.gz\0" \
139 "bootdir=/boot\0" \
140 "bootpart=0:2\0" \
141 "console=ttyO2,115200n8\0" \
142 "mpurate=auto\0" \
143 "buddy=none\0" \
144 "optargs=\0" \
145 "camera=none\0" \
146 "vram=12M\0" \
147 "dvimode=640x480MR-16@60\0" \
148 "defaultdisplay=dvi\0" \
149 "mmcdev=0\0" \
150 "mmcroot=/dev/mmcblk0p2 rw\0" \
151 "mmcrootfstype=ext3 rootwait\0" \
152 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
153 "nandrootfstype=ubifs\0" \
154 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
155 "ramrootfstype=ext2\0" \
156 "mmcargs=setenv bootargs console=${console} " \
157 "${optargs} " \
158 "mpurate=${mpurate} " \
159 "buddy=${buddy} "\
160 "camera=${camera} "\
161 "vram=${vram} " \
162 "omapfb.mode=dvi:${dvimode} " \
163 "omapdss.def_disp=${defaultdisplay} " \
164 "root=${mmcroot} " \
165 "rootfstype=${mmcrootfstype}\0" \
166 "nandargs=setenv bootargs console=${console} " \
167 "${optargs} " \
168 "mpurate=${mpurate} " \
169 "buddy=${buddy} "\
170 "camera=${camera} "\
171 "vram=${vram} " \
172 "omapfb.mode=dvi:${dvimode} " \
173 "omapdss.def_disp=${defaultdisplay} " \
174 "root=${nandroot} " \
175 "rootfstype=${nandrootfstype}\0" \
176 "findfdt=" \
177 "if test $beaglerev = AxBx; then " \
178 "setenv fdtfile omap3-beagle.dtb; fi; " \
179 "if test $beaglerev = Cx; then " \
180 "setenv fdtfile omap3-beagle.dtb; fi; " \
181 "if test $beaglerev = C4; then " \
182 "setenv fdtfile omap3-beagle.dtb; fi; " \
183 "if test $beaglerev = xMAB; then " \
184 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
185 "if test $beaglerev = xMC; then " \
186 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \
187 "if test $fdtfile = undefined; then " \
188 "echo WARNING: Could not determine device tree to use; fi; \0" \
189 "validatefdt=" \
190 "if test $beaglerev = xMAB; then " \
191 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
192 "setenv fdtfile omap3-beagle-xm.dtb; " \
193 "fi; " \
194 "fi; \0" \
195 "bootenv=uEnv.txt\0" \
196 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
197 "importbootenv=echo Importing environment from mmc ...; " \
198 "env import -t -r $loadaddr $filesize\0" \
199 "ramargs=setenv bootargs console=${console} " \
200 "${optargs} " \
201 "mpurate=${mpurate} " \
202 "buddy=${buddy} "\
203 "vram=${vram} " \
204 "omapfb.mode=dvi:${dvimode} " \
205 "omapdss.def_disp=${defaultdisplay} " \
206 "root=${ramroot} " \
207 "rootfstype=${ramrootfstype}\0" \
208 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
209 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
210 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
211 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
212 "source ${loadaddr}\0" \
213 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
214 "mmcboot=echo Booting from mmc ...; " \
215 "run mmcargs; " \
216 "bootm ${loadaddr}\0" \
217 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
218 "run mmcargs; " \
219 "bootz ${loadaddr} - ${fdtaddr}\0" \
220 "nandboot=echo Booting from nand ...; " \
221 "run nandargs; " \
222 "nand read ${loadaddr} 280000 400000; " \
223 "bootm ${loadaddr}\0" \
224 "ramboot=echo Booting from ramdisk ...; " \
225 "run ramargs; " \
226 "bootm ${loadaddr}\0" \
227 "userbutton=if gpio input 173; then run userbutton_xm; " \
228 "else run userbutton_nonxm; fi;\0" \
229 "userbutton_xm=gpio input 4;\0" \
230 "userbutton_nonxm=gpio input 7;\0" \
231 BOOTENV
232
233 /*
234 * OMAP3 has 12 GP timers, they can be driven by the system clock
235 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
236 * This rate is divided by a local divisor.
237 */
238 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
239
240 /*-----------------------------------------------------------------------
241 * FLASH and environment organization
242 */
243
244 /* **** PISMO SUPPORT *** */
245 #if defined(CONFIG_CMD_NAND)
246 #define CONFIG_SYS_FLASH_BASE NAND_BASE
247 #endif
248
249 /* Monitor at start of flash */
250 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
251 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
252
253 #define CONFIG_ENV_IS_IN_NAND 1
254 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
255 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
256 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
257
258 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
259 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
260 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
261
262 #define CONFIG_OMAP3_SPI
263
264 /* Defines for SPL */
265 #define CONFIG_SPL_OMAP3_ID_NAND
266
267 /* NAND boot config */
268 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
269 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
270 #define CONFIG_SYS_NAND_PAGE_COUNT 64
271 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
272 #define CONFIG_SYS_NAND_OOBSIZE 64
273 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
274 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
275 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
276 10, 11, 12, 13}
277 #define CONFIG_SYS_NAND_ECCSIZE 512
278 #define CONFIG_SYS_NAND_ECCBYTES 3
279 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
280 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
281 /* NAND: SPL falcon mode configs */
282 #ifdef CONFIG_SPL_OS_BOOT
283 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
284 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
285 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
286 #endif
287
288 #endif /* __CONFIG_H */