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1 /*
2 * Configuration settings for the TI OMAP3 EVM board.
3 *
4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Author :
7 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
11 *
12 * Manikandan Pillai <mani.pillai@ti.com>
13 *
14 * SPDX-License-Identifier: GPL-2.0+
15 */
16
17 #ifndef __OMAP3EVM_CONFIG_H
18 #define __OMAP3EVM_CONFIG_H
19
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/omap.h>
22
23 /* ----------------------------------------------------------------------------
24 * Supported U-Boot commands
25 * ----------------------------------------------------------------------------
26 */
27
28 #define CONFIG_CMD_JFFS2
29
30 #define CONFIG_CMD_NAND
31
32 /* ----------------------------------------------------------------------------
33 * Supported U-Boot features
34 * ----------------------------------------------------------------------------
35 */
36 #define CONFIG_SYS_LONGHELP
37
38 /* Allow to overwrite serial and ethaddr */
39 #define CONFIG_ENV_OVERWRITE
40
41 /* Add auto-completion support */
42 #define CONFIG_AUTO_COMPLETE
43
44 /* ----------------------------------------------------------------------------
45 * Supported hardware
46 * ----------------------------------------------------------------------------
47 */
48
49 /* MMC */
50 #define CONFIG_MMC
51 #define CONFIG_GENERIC_MMC
52 #define CONFIG_OMAP_HSMMC
53
54 /* SPL */
55 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
56 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
57
58 /* Partition tables */
59 #define CONFIG_EFI_PARTITION
60 #define CONFIG_DOS_PARTITION
61
62 /* USB
63 *
64 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
65 * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
66 */
67 #define CONFIG_USB_OMAP3
68 #define CONFIG_USB_MUSB_HCD
69 /* #define CONFIG_USB_MUSB_UDC */
70
71 /* NAND SPL */
72 #define CONFIG_SPL_NAND_SIMPLE
73 #define CONFIG_SPL_NAND_BASE
74 #define CONFIG_SPL_NAND_DRIVERS
75 #define CONFIG_SPL_NAND_ECC
76 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
77 #define CONFIG_SYS_NAND_PAGE_COUNT 64
78 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
79 #define CONFIG_SYS_NAND_OOBSIZE 64
80 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
81 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
82 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
83 10, 11, 12, 13}
84 #define CONFIG_SYS_NAND_ECCSIZE 512
85 #define CONFIG_SYS_NAND_ECCBYTES 3
86 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
87 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
88 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
89
90 /*
91 * High level configuration options
92 */
93 #define CONFIG_OMAP /* This is TI OMAP core */
94 #define CONFIG_OMAP_GPIO
95 #define CONFIG_OMAP_COMMON
96 /* Common ARM Erratas */
97 #define CONFIG_ARM_ERRATA_454179
98 #define CONFIG_ARM_ERRATA_430973
99 #define CONFIG_ARM_ERRATA_621766
100
101 #define CONFIG_SDRC /* The chip has SDRC controller */
102
103 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
104 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
105
106 /*
107 * Clock related definitions
108 */
109 #define V_OSCK 26000000 /* Clock output from T2 */
110 #define V_SCLK (V_OSCK >> 1)
111
112 /*
113 * OMAP3 has 12 GP timers, they can be driven by the system clock
114 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
115 * This rate is divided by a local divisor.
116 */
117 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
118 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
119
120 /* Size of environment - 128KB */
121 #define CONFIG_ENV_SIZE (128 << 10)
122
123 /* Size of malloc pool */
124 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
125
126 /*
127 * Physical Memory Map
128 * Note 1: CS1 may or may not be populated
129 * Note 2: SDRAM size is expected to be at least 32MB
130 */
131 #define CONFIG_NR_DRAM_BANKS 2
132 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
133 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
134
135 /* Limits for memtest */
136 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
137 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
138 0x01F00000) /* 31MB */
139
140 /* Default load address */
141 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
142
143 /* -----------------------------------------------------------------------------
144 * Hardware drivers
145 * -----------------------------------------------------------------------------
146 */
147
148 /*
149 * NS16550 Configuration
150 */
151 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
152
153 #define CONFIG_SYS_NS16550_SERIAL
154 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
155 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
156
157 /*
158 * select serial console configuration
159 */
160 #define CONFIG_CONS_INDEX 1
161 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
162 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
163 #define CONFIG_BAUDRATE 115200
164 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
165 115200}
166
167 /*
168 * I2C
169 */
170 #define CONFIG_SYS_I2C
171 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
172 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
173 #define CONFIG_SYS_I2C_OMAP34XX
174
175 /*
176 * PISMO support
177 */
178 /* Monitor at start of flash - Reserve 2 sectors */
179 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
180
181 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
182
183 /* Start location & size of environment */
184 #define ONENAND_ENV_OFFSET 0x260000
185 #define SMNAND_ENV_OFFSET 0x260000
186
187 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
188
189 /*
190 * NAND
191 */
192 /* Physical address to access NAND */
193 #define CONFIG_SYS_NAND_ADDR NAND_BASE
194
195 /* Physical address to access NAND at CS0 */
196 #define CONFIG_SYS_NAND_BASE NAND_BASE
197
198 /* Max number of NAND devices */
199 #define CONFIG_SYS_MAX_NAND_DEVICE 1
200 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
201 /* Timeout values (in ticks) */
202 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
203 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
204
205 /* Flash banks JFFS2 should use */
206 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
207 CONFIG_SYS_MAX_NAND_DEVICE)
208
209 #define CONFIG_SYS_JFFS2_MEM_NAND
210 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
211 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
212
213 #define CONFIG_JFFS2_NAND
214 /* nand device jffs2 lives on */
215 #define CONFIG_JFFS2_DEV "nand0"
216 /* Start of jffs2 partition */
217 #define CONFIG_JFFS2_PART_OFFSET 0x680000
218 /* Size of jffs2 partition */
219 #define CONFIG_JFFS2_PART_SIZE 0xf980000
220
221 /*
222 * USB
223 */
224 #ifdef CONFIG_USB_OMAP3
225
226 #ifdef CONFIG_USB_MUSB_HCD
227
228 #define CONGIG_CMD_STORAGE
229
230 #ifdef CONFIG_USB_KEYBOARD
231 #define CONFIG_SYS_USB_EVENT_POLL
232 #define CONFIG_PREBOOT "usb start"
233 #endif /* CONFIG_USB_KEYBOARD */
234
235 #endif /* CONFIG_USB_MUSB_HCD */
236
237 #ifdef CONFIG_USB_MUSB_UDC
238 /* USB device configuration */
239 #define CONFIG_USB_DEVICE
240 #define CONFIG_USB_TTY
241
242 /* Change these to suit your needs */
243 #define CONFIG_USBD_VENDORID 0x0451
244 #define CONFIG_USBD_PRODUCTID 0x5678
245 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
246 #define CONFIG_USBD_PRODUCT_NAME "EVM"
247 #endif /* CONFIG_USB_MUSB_UDC */
248
249 #endif /* CONFIG_USB_OMAP3 */
250
251 /* ----------------------------------------------------------------------------
252 * U-Boot features
253 * ----------------------------------------------------------------------------
254 */
255 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */
256
257 #define CONFIG_MISC_INIT_R
258
259 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
260 #define CONFIG_SETUP_MEMORY_TAGS
261 #define CONFIG_INITRD_TAG
262 #define CONFIG_REVISION_TAG
263
264 /* Size of Console IO buffer */
265 #define CONFIG_SYS_CBSIZE 512
266
267 /* Size of print buffer */
268 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
269 sizeof(CONFIG_SYS_PROMPT) + 16)
270
271 /* Size of bootarg buffer */
272 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
273
274 #define CONFIG_BOOTFILE "uImage"
275
276 /*
277 * NAND / OneNAND
278 */
279 #if defined(CONFIG_CMD_NAND)
280 #define CONFIG_SYS_FLASH_BASE NAND_BASE
281
282 #define CONFIG_NAND_OMAP_GPMC
283 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
284 #elif defined(CONFIG_CMD_ONENAND)
285 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
286 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
287 #endif
288
289 #if !defined(CONFIG_ENV_IS_NOWHERE)
290 #if defined(CONFIG_CMD_NAND)
291 #define CONFIG_ENV_IS_IN_NAND
292 #elif defined(CONFIG_CMD_ONENAND)
293 #define CONFIG_ENV_IS_IN_ONENAND
294 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
295 #endif
296 #endif /* CONFIG_ENV_IS_NOWHERE */
297
298 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
299
300 #if defined(CONFIG_CMD_NET)
301
302 /* Ethernet (SMSC9115 from SMSC9118 family) */
303 #define CONFIG_SMC911X
304 #define CONFIG_SMC911X_32_BIT
305 #define CONFIG_SMC911X_BASE 0x2C000000
306
307 /* BOOTP fields */
308 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
309 #define CONFIG_BOOTP_GATEWAY 0x00000002
310 #define CONFIG_BOOTP_HOSTNAME 0x00000004
311 #define CONFIG_BOOTP_BOOTPATH 0x00000010
312
313 #endif /* CONFIG_CMD_NET */
314
315 /* Support for relocation */
316 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
317 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
318 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
319 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
320 CONFIG_SYS_INIT_RAM_SIZE - \
321 GENERATED_GBL_DATA_SIZE)
322
323 /* -----------------------------------------------------------------------------
324 * Board specific
325 * -----------------------------------------------------------------------------
326 */
327 #define CONFIG_SYS_NO_FLASH
328
329 /* Uncomment to define the board revision statically */
330 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
331
332 /* Defines for SPL */
333 #define CONFIG_SPL_FRAMEWORK
334 #define CONFIG_SPL_TEXT_BASE 0x40200800
335 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
336 CONFIG_SPL_TEXT_BASE)
337
338 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
339 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
340
341 #define CONFIG_SPL_BOARD_INIT
342 #define CONFIG_SPL_OMAP3_ID_NAND
343 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
344
345 /*
346 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
347 * 64 bytes before this address should be set aside for u-boot.img's
348 * header. That is 0x800FFFC0--0x80100000 should not be used for any
349 * other needs.
350 */
351 #define CONFIG_SYS_TEXT_BASE 0x80100000
352 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
353 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
354
355 /* -----------------------------------------------------------------------------
356 * Default environment
357 * -----------------------------------------------------------------------------
358 */
359
360 #define CONFIG_EXTRA_ENV_SETTINGS \
361 "loadaddr=0x82000000\0" \
362 "usbtty=cdc_acm\0" \
363 "mmcdev=0\0" \
364 "console=ttyO0,115200n8\0" \
365 "mmcargs=setenv bootargs console=${console} " \
366 "root=/dev/mmcblk0p2 rw " \
367 "rootfstype=ext3 rootwait\0" \
368 "nandargs=setenv bootargs console=${console} " \
369 "root=/dev/mtdblock4 rw " \
370 "rootfstype=jffs2\0" \
371 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
372 "bootscript=echo Running bootscript from mmc ...; " \
373 "source ${loadaddr}\0" \
374 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
375 "mmcboot=echo Booting from mmc ...; " \
376 "run mmcargs; " \
377 "bootm ${loadaddr}\0" \
378 "nandboot=echo Booting from nand ...; " \
379 "run nandargs; " \
380 "onenand read ${loadaddr} 280000 400000; " \
381 "bootm ${loadaddr}\0" \
382
383 #define CONFIG_BOOTCOMMAND \
384 "mmc dev ${mmcdev}; if mmc rescan; then " \
385 "if run loadbootscript; then " \
386 "run bootscript; " \
387 "else " \
388 "if run loaduimage; then " \
389 "run mmcboot; " \
390 "else run nandboot; " \
391 "fi; " \
392 "fi; " \
393 "else run nandboot; fi"
394
395 #endif /* __OMAP3EVM_CONFIG_H */