include/configs/omap3_evm.h

   1 /*
   2  * Configuration settings for the TI OMAP3 EVM board.
   3  *
   4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * Author :
   7  *      Manikandan Pillai <mani.pillai@ti.com>
   8  * Derived from Beagle Board and 3430 SDP code by
   9  *      Richard Woodruff <r-woodruff2@ti.com>
  10  *      Syed Mohammed Khasim <khasim@ti.com>
  11  *
  12  * Manikandan Pillai <mani.pillai@ti.com>
  13  *
  14  * SPDX-License-Identifier:     GPL-2.0+
  15  */
  16
  17 #ifndef __OMAP3EVM_CONFIG_H
  18 #define __OMAP3EVM_CONFIG_H
  19
  20 #include <asm/arch/cpu.h>
  21 #include <asm/arch/omap.h>
  22
  23 /* ----------------------------------------------------------------------------
  24  * Supported U-Boot features
  25  * ----------------------------------------------------------------------------
  26  */
  27 #define CONFIG_SYS_LONGHELP
  28
  29 /* Allow to overwrite serial and ethaddr */
  30 #define CONFIG_ENV_OVERWRITE
  31
  32 /* Add auto-completion support */
  33 #define CONFIG_AUTO_COMPLETE
  34
  35 /* ----------------------------------------------------------------------------
  36  * Supported hardware
  37  * ----------------------------------------------------------------------------
  38  */
  39
  40 /* SPL */
  41 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  42 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  43
  44 /* Partition tables */
  45
  46 /* USB
  47  *
  48  * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
  49  * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
  50  */
  51 #define CONFIG_USB_OMAP3
  52 #define CONFIG_USB_MUSB_HCD
  53 /* #define CONFIG_USB_MUSB_UDC */
  54
  55 /* NAND SPL */
  56 #define CONFIG_SPL_NAND_SIMPLE
  57 #define CONFIG_SPL_NAND_BASE
  58 #define CONFIG_SPL_NAND_DRIVERS
  59 #define CONFIG_SPL_NAND_ECC
  60 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  61 #define CONFIG_SYS_NAND_PAGE_COUNT      64
  62 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
  63 #define CONFIG_SYS_NAND_OOBSIZE         64
  64 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
  65 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
  66 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
  67                                                 10, 11, 12, 13}
  68 #define CONFIG_SYS_NAND_ECCSIZE         512
  69 #define CONFIG_SYS_NAND_ECCBYTES        3
  70 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
  71 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
  72 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
  73
  74 /*
  75  * High level configuration options
  76  */
  77
  78 #define CONFIG_SDRC                     /* The chip has SDRC controller */
  79
  80 /*
  81  * Clock related definitions
  82  */
  83 #define V_OSCK                  26000000        /* Clock output from T2 */
  84 #define V_SCLK                  (V_OSCK >> 1)
  85
  86 /*
  87  * OMAP3 has 12 GP timers, they can be driven by the system clock
  88  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  89  * This rate is divided by a local divisor.
  90  */
  91 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
  92 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
  93
  94 /* Size of environment - 128KB */
  95 #define CONFIG_ENV_SIZE                 (128 << 10)
  96
  97 /* Size of malloc pool */
  98 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  99
 100 /*
 101  * Physical Memory Map
 102  * Note 1: CS1 may or may not be populated
 103  * Note 2: SDRAM size is expected to be at least 32MB
 104  */
 105 #define CONFIG_NR_DRAM_BANKS            2
 106 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
 107 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
 108
 109 /* Limits for memtest */
 110 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 111 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 112                                                 0x01F00000) /* 31MB */
 113
 114 /* Default load address */
 115 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
 116
 117 /* -----------------------------------------------------------------------------
 118  * Hardware drivers
 119  * -----------------------------------------------------------------------------
 120  */
 121
 122 /*
 123  * NS16550 Configuration
 124  */
 125 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
 126
 127 #define CONFIG_SYS_NS16550_SERIAL
 128 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
 129 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
 130
 131 /*
 132  * select serial console configuration
 133  */
 134 #define CONFIG_CONS_INDEX               1
 135 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
 136 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
 137 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 138                                         115200}
 139
 140 /*
 141  * I2C
 142  */
 143 #define CONFIG_SYS_I2C
 144 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 145 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 146
 147 /*
 148  * PISMO support
 149  */
 150 /* Monitor at start of flash - Reserve 2 sectors */
 151 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 152
 153 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 154
 155 /* Start location & size of environment */
 156 #define ONENAND_ENV_OFFSET              0x260000
 157 #define SMNAND_ENV_OFFSET               0x260000
 158
 159 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 160
 161 /*
 162  * NAND
 163  */
 164 /* Physical address to access NAND */
 165 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
 166
 167 /* Physical address to access NAND at CS0 */
 168 #define CONFIG_SYS_NAND_BASE            NAND_BASE
 169
 170 /* Max number of NAND devices */
 171 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 172 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 173 /* Timeout values (in ticks) */
 174 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 175 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 176
 177 /* Flash banks JFFS2 should use */
 178 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 179                                                 CONFIG_SYS_MAX_NAND_DEVICE)
 180
 181 #define CONFIG_SYS_JFFS2_MEM_NAND
 182 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 183 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 184
 185 #define CONFIG_JFFS2_NAND
 186 /* nand device jffs2 lives on */
 187 #define CONFIG_JFFS2_DEV                "nand0"
 188 /* Start of jffs2 partition */
 189 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 190 /* Size of jffs2 partition */
 191 #define CONFIG_JFFS2_PART_SIZE          0xf980000
 192
 193 /*
 194  * USB
 195  */
 196 #ifdef CONFIG_USB_OMAP3
 197
 198 #ifdef CONFIG_USB_MUSB_HCD
 199
 200 #ifdef CONFIG_USB_KEYBOARD
 201 #define CONFIG_SYS_USB_EVENT_POLL
 202 #define CONFIG_PREBOOT                  "usb start"
 203 #endif /* CONFIG_USB_KEYBOARD */
 204
 205 #endif /* CONFIG_USB_MUSB_HCD */
 206
 207 #ifdef CONFIG_USB_MUSB_UDC
 208 /* USB device configuration */
 209 #define CONFIG_USB_DEVICE
 210 #define CONFIG_USB_TTY
 211
 212 /* Change these to suit your needs */
 213 #define CONFIG_USBD_VENDORID            0x0451
 214 #define CONFIG_USBD_PRODUCTID           0x5678
 215 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 216 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
 217 #endif /* CONFIG_USB_MUSB_UDC */
 218
 219 #endif /* CONFIG_USB_OMAP3 */
 220
 221 /* ----------------------------------------------------------------------------
 222  * U-Boot features
 223  * ----------------------------------------------------------------------------
 224  */
 225 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
 226
 227 #define CONFIG_MISC_INIT_R
 228
 229 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
 230 #define CONFIG_SETUP_MEMORY_TAGS
 231 #define CONFIG_INITRD_TAG
 232 #define CONFIG_REVISION_TAG
 233
 234 /* Size of Console IO buffer */
 235 #define CONFIG_SYS_CBSIZE               512
 236
 237 /* Size of print buffer */
 238 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 239                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 240
 241 /* Size of bootarg buffer */
 242 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 243
 244 #define CONFIG_BOOTFILE                 "uImage"
 245
 246 /*
 247  * NAND / OneNAND
 248  */
 249 #if defined(CONFIG_CMD_NAND)
 250 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
 251
 252 #define CONFIG_NAND_OMAP_GPMC
 253 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 254 #elif defined(CONFIG_CMD_ONENAND)
 255 #define CONFIG_SYS_FLASH_BASE           ONENAND_MAP
 256 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 257 #endif
 258
 259 #if !defined(CONFIG_ENV_IS_NOWHERE)
 260 #if defined(CONFIG_CMD_NAND)
 261 #elif defined(CONFIG_CMD_ONENAND)
 262 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 263 #endif
 264 #endif /* CONFIG_ENV_IS_NOWHERE */
 265
 266 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 267
 268 #if defined(CONFIG_CMD_NET)
 269
 270 /* Ethernet (SMSC9115 from SMSC9118 family) */
 271 #define CONFIG_SMC911X
 272 #define CONFIG_SMC911X_32_BIT
 273 #define CONFIG_SMC911X_BASE             0x2C000000
 274
 275 /* BOOTP fields */
 276 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 277 #define CONFIG_BOOTP_GATEWAY            0x00000002
 278 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 279 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 280
 281 #endif /* CONFIG_CMD_NET */
 282
 283 /* Support for relocation */
 284 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 285 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 286 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 287 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 288                                          CONFIG_SYS_INIT_RAM_SIZE - \
 289                                          GENERATED_GBL_DATA_SIZE)
 290
 291 /* -----------------------------------------------------------------------------
 292  * Board specific
 293  * -----------------------------------------------------------------------------
 294  */
 295
 296 /* Uncomment to define the board revision statically */
 297 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 298
 299 /* Defines for SPL */
 300 #define CONFIG_SPL_FRAMEWORK
 301 #define CONFIG_SPL_TEXT_BASE            0x40200800
 302 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 303                                          CONFIG_SPL_TEXT_BASE)
 304
 305 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 306 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 307
 308 #define CONFIG_SPL_OMAP3_ID_NAND
 309 #define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
 310
 311 /*
 312  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 313  * 64 bytes before this address should be set aside for u-boot.img's
 314  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 315  * other needs.
 316  */
 317 #define CONFIG_SYS_TEXT_BASE            0x80100000
 318 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 319 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 320
 321 /* -----------------------------------------------------------------------------
 322  * Default environment
 323  * -----------------------------------------------------------------------------
 324  */
 325
 326 #define CONFIG_EXTRA_ENV_SETTINGS \
 327         "loadaddr=0x82000000\0" \
 328         "usbtty=cdc_acm\0" \
 329         "mmcdev=0\0" \
 330         "console=ttyO0,115200n8\0" \
 331         "mmcargs=setenv bootargs console=${console} " \
 332                 "root=/dev/mmcblk0p2 rw " \
 333                 "rootfstype=ext3 rootwait\0" \
 334         "nandargs=setenv bootargs console=${console} " \
 335                 "root=/dev/mtdblock4 rw " \
 336                 "rootfstype=jffs2\0" \
 337         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 338         "bootscript=echo Running bootscript from mmc ...; " \
 339                 "source ${loadaddr}\0" \
 340         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 341         "mmcboot=echo Booting from mmc ...; " \
 342                 "run mmcargs; " \
 343                 "bootm ${loadaddr}\0" \
 344         "nandboot=echo Booting from nand ...; " \
 345                 "run nandargs; " \
 346                 "onenand read ${loadaddr} 280000 400000; " \
 347                 "bootm ${loadaddr}\0" \
 348
 349 #define CONFIG_BOOTCOMMAND \
 350         "mmc dev ${mmcdev}; if mmc rescan; then " \
 351                 "if run loadbootscript; then " \
 352                         "run bootscript; " \
 353                 "else " \
 354                         "if run loaduimage; then " \
 355                                 "run mmcboot; " \
 356                         "else run nandboot; " \
 357                         "fi; " \
 358                 "fi; " \
 359         "else run nandboot; fi"
 360
 361 #endif /* __OMAP3EVM_CONFIG_H */