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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/omap3_evm.h
2 * Configuration settings for the TI OMAP3 EVM board.
4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
7 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * Manikandan Pillai <mani.pillai@ti.com>
14 * SPDX-License-Identifier: GPL-2.0+
17 #ifndef __OMAP3EVM_CONFIG_H
18 #define __OMAP3EVM_CONFIG_H
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/omap.h>
23 /* ----------------------------------------------------------------------------
24 * Supported U-Boot commands
25 * ----------------------------------------------------------------------------
28 #define CONFIG_CMD_JFFS2
30 #define CONFIG_CMD_NAND
32 /* ----------------------------------------------------------------------------
33 * Supported U-Boot features
34 * ----------------------------------------------------------------------------
36 #define CONFIG_SYS_LONGHELP
38 /* Allow to overwrite serial and ethaddr */
39 #define CONFIG_ENV_OVERWRITE
41 /* Add auto-completion support */
42 #define CONFIG_AUTO_COMPLETE
44 /* ----------------------------------------------------------------------------
46 * ----------------------------------------------------------------------------
50 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
51 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
53 /* Partition tables */
57 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
58 * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
60 #define CONFIG_USB_OMAP3
61 #define CONFIG_USB_MUSB_HCD
62 /* #define CONFIG_USB_MUSB_UDC */
65 #define CONFIG_SPL_NAND_SIMPLE
66 #define CONFIG_SPL_NAND_BASE
67 #define CONFIG_SPL_NAND_DRIVERS
68 #define CONFIG_SPL_NAND_ECC
69 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
70 #define CONFIG_SYS_NAND_PAGE_COUNT 64
71 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
72 #define CONFIG_SYS_NAND_OOBSIZE 64
73 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
74 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
75 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
77 #define CONFIG_SYS_NAND_ECCSIZE 512
78 #define CONFIG_SYS_NAND_ECCBYTES 3
79 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
80 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
81 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
84 * High level configuration options
86 #define CONFIG_OMAP /* This is TI OMAP core */
87 #define CONFIG_OMAP_GPIO
89 #define CONFIG_SDRC /* The chip has SDRC controller */
91 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
92 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
95 * Clock related definitions
97 #define V_OSCK 26000000 /* Clock output from T2 */
98 #define V_SCLK (V_OSCK >> 1)
101 * OMAP3 has 12 GP timers, they can be driven by the system clock
102 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
103 * This rate is divided by a local divisor.
105 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
106 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
108 /* Size of environment - 128KB */
109 #define CONFIG_ENV_SIZE (128 << 10)
111 /* Size of malloc pool */
112 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
115 * Physical Memory Map
116 * Note 1: CS1 may or may not be populated
117 * Note 2: SDRAM size is expected to be at least 32MB
119 #define CONFIG_NR_DRAM_BANKS 2
120 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
121 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
123 /* Limits for memtest */
124 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
125 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
126 0x01F00000) /* 31MB */
128 /* Default load address */
129 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
131 /* -----------------------------------------------------------------------------
133 * -----------------------------------------------------------------------------
137 * NS16550 Configuration
139 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
141 #define CONFIG_SYS_NS16550_SERIAL
142 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
143 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
146 * select serial console configuration
148 #define CONFIG_CONS_INDEX 1
149 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
150 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
151 #define CONFIG_BAUDRATE 115200
152 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
158 #define CONFIG_SYS_I2C
159 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
160 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
161 #define CONFIG_SYS_I2C_OMAP34XX
166 /* Monitor at start of flash - Reserve 2 sectors */
167 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
169 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
171 /* Start location & size of environment */
172 #define ONENAND_ENV_OFFSET 0x260000
173 #define SMNAND_ENV_OFFSET 0x260000
175 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
180 /* Physical address to access NAND */
181 #define CONFIG_SYS_NAND_ADDR NAND_BASE
183 /* Physical address to access NAND at CS0 */
184 #define CONFIG_SYS_NAND_BASE NAND_BASE
186 /* Max number of NAND devices */
187 #define CONFIG_SYS_MAX_NAND_DEVICE 1
188 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
189 /* Timeout values (in ticks) */
190 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
191 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
193 /* Flash banks JFFS2 should use */
194 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
195 CONFIG_SYS_MAX_NAND_DEVICE)
197 #define CONFIG_SYS_JFFS2_MEM_NAND
198 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
199 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
201 #define CONFIG_JFFS2_NAND
202 /* nand device jffs2 lives on */
203 #define CONFIG_JFFS2_DEV "nand0"
204 /* Start of jffs2 partition */
205 #define CONFIG_JFFS2_PART_OFFSET 0x680000
206 /* Size of jffs2 partition */
207 #define CONFIG_JFFS2_PART_SIZE 0xf980000
212 #ifdef CONFIG_USB_OMAP3
214 #ifdef CONFIG_USB_MUSB_HCD
216 #ifdef CONFIG_USB_KEYBOARD
217 #define CONFIG_SYS_USB_EVENT_POLL
218 #define CONFIG_PREBOOT "usb start"
219 #endif /* CONFIG_USB_KEYBOARD */
221 #endif /* CONFIG_USB_MUSB_HCD */
223 #ifdef CONFIG_USB_MUSB_UDC
224 /* USB device configuration */
225 #define CONFIG_USB_DEVICE
226 #define CONFIG_USB_TTY
228 /* Change these to suit your needs */
229 #define CONFIG_USBD_VENDORID 0x0451
230 #define CONFIG_USBD_PRODUCTID 0x5678
231 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
232 #define CONFIG_USBD_PRODUCT_NAME "EVM"
233 #endif /* CONFIG_USB_MUSB_UDC */
235 #endif /* CONFIG_USB_OMAP3 */
237 /* ----------------------------------------------------------------------------
239 * ----------------------------------------------------------------------------
241 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */
243 #define CONFIG_MISC_INIT_R
245 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
246 #define CONFIG_SETUP_MEMORY_TAGS
247 #define CONFIG_INITRD_TAG
248 #define CONFIG_REVISION_TAG
250 /* Size of Console IO buffer */
251 #define CONFIG_SYS_CBSIZE 512
253 /* Size of print buffer */
254 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
255 sizeof(CONFIG_SYS_PROMPT) + 16)
257 /* Size of bootarg buffer */
258 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
260 #define CONFIG_BOOTFILE "uImage"
265 #if defined(CONFIG_CMD_NAND)
266 #define CONFIG_SYS_FLASH_BASE NAND_BASE
268 #define CONFIG_NAND_OMAP_GPMC
269 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
270 #elif defined(CONFIG_CMD_ONENAND)
271 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
272 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
275 #if !defined(CONFIG_ENV_IS_NOWHERE)
276 #if defined(CONFIG_CMD_NAND)
277 #define CONFIG_ENV_IS_IN_NAND
278 #elif defined(CONFIG_CMD_ONENAND)
279 #define CONFIG_ENV_IS_IN_ONENAND
280 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
282 #endif /* CONFIG_ENV_IS_NOWHERE */
284 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
286 #if defined(CONFIG_CMD_NET)
288 /* Ethernet (SMSC9115 from SMSC9118 family) */
289 #define CONFIG_SMC911X
290 #define CONFIG_SMC911X_32_BIT
291 #define CONFIG_SMC911X_BASE 0x2C000000
294 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
295 #define CONFIG_BOOTP_GATEWAY 0x00000002
296 #define CONFIG_BOOTP_HOSTNAME 0x00000004
297 #define CONFIG_BOOTP_BOOTPATH 0x00000010
299 #endif /* CONFIG_CMD_NET */
301 /* Support for relocation */
302 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
303 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
304 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
305 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
306 CONFIG_SYS_INIT_RAM_SIZE - \
307 GENERATED_GBL_DATA_SIZE)
309 /* -----------------------------------------------------------------------------
311 * -----------------------------------------------------------------------------
314 /* Uncomment to define the board revision statically */
315 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
317 /* Defines for SPL */
318 #define CONFIG_SPL_FRAMEWORK
319 #define CONFIG_SPL_TEXT_BASE 0x40200800
320 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
321 CONFIG_SPL_TEXT_BASE)
323 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
324 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
326 #define CONFIG_SPL_BOARD_INIT
327 #define CONFIG_SPL_OMAP3_ID_NAND
328 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
331 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
332 * 64 bytes before this address should be set aside for u-boot.img's
333 * header. That is 0x800FFFC0--0x80100000 should not be used for any
336 #define CONFIG_SYS_TEXT_BASE 0x80100000
337 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
338 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
340 /* -----------------------------------------------------------------------------
341 * Default environment
342 * -----------------------------------------------------------------------------
345 #define CONFIG_EXTRA_ENV_SETTINGS \
346 "loadaddr=0x82000000\0" \
349 "console=ttyO0,115200n8\0" \
350 "mmcargs=setenv bootargs console=${console} " \
351 "root=/dev/mmcblk0p2 rw " \
352 "rootfstype=ext3 rootwait\0" \
353 "nandargs=setenv bootargs console=${console} " \
354 "root=/dev/mtdblock4 rw " \
355 "rootfstype=jffs2\0" \
356 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
357 "bootscript=echo Running bootscript from mmc ...; " \
358 "source ${loadaddr}\0" \
359 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
360 "mmcboot=echo Booting from mmc ...; " \
362 "bootm ${loadaddr}\0" \
363 "nandboot=echo Booting from nand ...; " \
365 "onenand read ${loadaddr} 280000 400000; " \
366 "bootm ${loadaddr}\0" \
368 #define CONFIG_BOOTCOMMAND \
369 "mmc dev ${mmcdev}; if mmc rescan; then " \
370 "if run loadbootscript; then " \
373 "if run loaduimage; then " \
375 "else run nandboot; " \
378 "else run nandboot; fi"
380 #endif /* __OMAP3EVM_CONFIG_H */