include/configs/omap3_evm_common.h

   1 /*
   2  * Common configuration settings for the TI OMAP3 EVM board.
   3  *
   4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12  * kind, whether express or implied; without even the implied warranty
  13  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef __OMAP3_EVM_COMMON_H
  18 #define __OMAP3_EVM_COMMON_H
  19
  20 /*
  21  * High level configuration options
  22  */
  23 #define CONFIG_OMAP                     /* This is TI OMAP core */
  24 #define CONFIG_OMAP34XX                 /* belonging to 34XX family */
  25 #define CONFIG_OMAP_GPIO
  26
  27 #define CONFIG_SDRC                     /* The chip has SDRC controller */
  28
  29 #define CONFIG_OMAP3_EVM                /* This is a OMAP3 EVM */
  30 #define CONFIG_TWL4030_POWER            /* with TWL4030 PMIC */
  31
  32 /*
  33  * Clock related definitions
  34  */
  35 #define V_OSCK                  26000000        /* Clock output from T2 */
  36 #define V_SCLK                  (V_OSCK >> 1)
  37
  38 /*
  39  * OMAP3 has 12 GP timers, they can be driven by the system clock
  40  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  41  * This rate is divided by a local divisor.
  42  */
  43 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
  44 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
  45 #define CONFIG_SYS_HZ                   1000
  46
  47 /* Size of environment - 128KB */
  48 #define CONFIG_ENV_SIZE                 (128 << 10)
  49
  50 /* Size of malloc pool */
  51 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  52
  53 /*
  54  * Physical Memory Map
  55  * Note 1: CS1 may or may not be populated
  56  * Note 2: SDRAM size is expected to be at least 32MB
  57  */
  58 #define CONFIG_NR_DRAM_BANKS            2
  59 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
  60 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
  61
  62 /* Limits for memtest */
  63 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
  64 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
  65                                                 0x01F00000) /* 31MB */
  66
  67 /* Default load address */
  68 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
  69
  70 /* -----------------------------------------------------------------------------
  71  * Hardware drivers
  72  * -----------------------------------------------------------------------------
  73  */
  74
  75 /*
  76  * NS16550 Configuration
  77  */
  78 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  79
  80 #define CONFIG_SYS_NS16550
  81 #define CONFIG_SYS_NS16550_SERIAL
  82 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  83 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  84
  85 /*
  86  * select serial console configuration
  87  */
  88 #define CONFIG_CONS_INDEX               1
  89 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
  90 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  91 #define CONFIG_BAUDRATE                 115200
  92 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  93                                         115200}
  94
  95 /*
  96  * I2C
  97  */
  98 #define CONFIG_HARD_I2C
  99 #define CONFIG_DRIVER_OMAP34XX_I2C
 100
 101 #define CONFIG_SYS_I2C_SPEED            100000
 102 #define CONFIG_SYS_I2C_SLAVE            1
 103
 104 /*
 105  * PISMO support
 106  */
 107 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 108 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 109
 110 /* Monitor at start of flash - Reserve 2 sectors */
 111 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 112
 113 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 114
 115 /* Start location & size of environment */
 116 #define ONENAND_ENV_OFFSET              0x260000
 117 #define SMNAND_ENV_OFFSET               0x260000
 118
 119 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 120
 121 /*
 122  * NAND
 123  */
 124 /* Physical address to access NAND */
 125 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
 126
 127 /* Physical address to access NAND at CS0 */
 128 #define CONFIG_SYS_NAND_BASE            NAND_BASE
 129
 130 /* Max number of NAND devices */
 131 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 132
 133 /* Timeout values (in ticks) */
 134 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 135 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 136
 137 /* Flash banks JFFS2 should use */
 138 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 139                                                 CONFIG_SYS_MAX_NAND_DEVICE)
 140
 141 #define CONFIG_SYS_JFFS2_MEM_NAND
 142 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 143 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 144
 145 #define CONFIG_JFFS2_NAND
 146 /* nand device jffs2 lives on */
 147 #define CONFIG_JFFS2_DEV                "nand0"
 148 /* Start of jffs2 partition */
 149 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 150 /* Size of jffs2 partition */
 151 #define CONFIG_JFFS2_PART_SIZE          0xf980000
 152
 153 /*
 154  * USB
 155  */
 156 #ifdef CONFIG_USB_OMAP3
 157
 158 #ifdef CONFIG_MUSB_HCD
 159 #define CONFIG_CMD_USB
 160
 161 #define CONFIG_USB_STORAGE
 162 #define CONGIG_CMD_STORAGE
 163 #define CONFIG_CMD_FAT
 164
 165 #ifdef CONFIG_USB_KEYBOARD
 166 #define CONFIG_SYS_USB_EVENT_POLL
 167 #define CONFIG_PREBOOT                  "usb start"
 168 #endif /* CONFIG_USB_KEYBOARD */
 169
 170 #endif /* CONFIG_MUSB_HCD */
 171
 172 #ifdef CONFIG_MUSB_UDC
 173 /* USB device configuration */
 174 #define CONFIG_USB_DEVICE
 175 #define CONFIG_USB_TTY
 176 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 177
 178 /* Change these to suit your needs */
 179 #define CONFIG_USBD_VENDORID            0x0451
 180 #define CONFIG_USBD_PRODUCTID           0x5678
 181 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 182 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
 183 #endif /* CONFIG_MUSB_UDC */
 184
 185 #endif /* CONFIG_USB_OMAP3 */
 186
 187 /* ----------------------------------------------------------------------------
 188  * U-boot features
 189  * ----------------------------------------------------------------------------
 190  */
 191 #define CONFIG_SYS_PROMPT               "OMAP3_EVM # "
 192 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
 193
 194 #define CONFIG_MISC_INIT_R
 195
 196 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
 197 #define CONFIG_SETUP_MEMORY_TAGS
 198 #define CONFIG_INITRD_TAG
 199 #define CONFIG_REVISION_TAG
 200
 201 /* Size of Console IO buffer */
 202 #define CONFIG_SYS_CBSIZE               512
 203
 204 /* Size of print buffer */
 205 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 206                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 207
 208 /* Size of bootarg buffer */
 209 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 210
 211 #define CONFIG_BOOTFILE                 "uImage"
 212
 213 /*
 214  * NAND / OneNAND
 215  */
 216 #if defined(CONFIG_CMD_NAND)
 217 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 218
 219 #define CONFIG_NAND_OMAP_GPMC
 220 #define GPMC_NAND_ECC_LP_x16_LAYOUT
 221 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 222 #elif defined(CONFIG_CMD_ONENAND)
 223 #define CONFIG_SYS_FLASH_BASE           PISMO1_ONEN_BASE
 224 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 225 #endif
 226
 227 #if !defined(CONFIG_ENV_IS_NOWHERE)
 228 #if defined(CONFIG_CMD_NAND)
 229 #define CONFIG_ENV_IS_IN_NAND
 230 #elif defined(CONFIG_CMD_ONENAND)
 231 #define CONFIG_ENV_IS_IN_ONENAND
 232 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 233 #endif
 234 #endif /* CONFIG_ENV_IS_NOWHERE */
 235
 236 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 237
 238 #if defined(CONFIG_CMD_NET)
 239
 240 /* Ethernet (SMSC9115 from SMSC9118 family) */
 241 #define CONFIG_SMC911X
 242 #define CONFIG_SMC911X_32_BIT
 243 #define CONFIG_SMC911X_BASE             0x2C000000
 244
 245 /* BOOTP fields */
 246 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 247 #define CONFIG_BOOTP_GATEWAY            0x00000002
 248 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 249 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 250
 251 #endif /* CONFIG_CMD_NET */
 252
 253 /* Support for relocation */
 254 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 255 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 256 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 257 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 258                                          CONFIG_SYS_INIT_RAM_SIZE - \
 259                                          GENERATED_GBL_DATA_SIZE)
 260
 261 /* -----------------------------------------------------------------------------
 262  * Board specific
 263  * -----------------------------------------------------------------------------
 264  */
 265 #define CONFIG_SYS_NO_FLASH
 266
 267 /* Uncomment to define the board revision statically */
 268 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 269
 270 #define CONFIG_SYS_CACHELINE_SIZE       64
 271
 272 /* Defines for SPL */
 273 #define CONFIG_SPL
 274 #define CONFIG_SPL_FRAMEWORK
 275 #define CONFIG_SPL_TEXT_BASE            0x40200800
 276 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 277 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 278
 279 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 280 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 281
 282 #define CONFIG_SPL_BOARD_INIT
 283 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 284 #define CONFIG_SPL_LIBDISK_SUPPORT
 285 #define CONFIG_SPL_I2C_SUPPORT
 286 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 287 #define CONFIG_SPL_SERIAL_SUPPORT
 288 #define CONFIG_SPL_POWER_SUPPORT
 289 #define CONFIG_SPL_OMAP3_ID_NAND
 290 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 291
 292 /*
 293  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 294  * 64 bytes before this address should be set aside for u-boot.img's
 295  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 296  * other needs.
 297  */
 298 #define CONFIG_SYS_TEXT_BASE            0x80100000
 299 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 300 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 301
 302 #endif /* __OMAP3_EVM_COMMON_H */