include/configs/omap3_evm_common.h

   1 /*
   2  * Common configuration settings for the TI OMAP3 EVM board.
   3  *
   4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12  * kind, whether express or implied; without even the implied warranty
  13  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef __OMAP3_EVM_COMMON_H
  18 #define __OMAP3_EVM_COMMON_H
  19
  20 /*
  21  * High level configuration options
  22  */
  23 #define CONFIG_OMAP                     /* This is TI OMAP core */
  24 #define CONFIG_OMAP34XX                 /* belonging to 34XX family */
  25
  26 #define CONFIG_SDRC                     /* The chip has SDRC controller */
  27
  28 #define CONFIG_OMAP3_EVM                /* This is a OMAP3 EVM */
  29 #define CONFIG_OMAP3_MICRON_DDR         /* with MICRON DDR part */
  30 #define CONFIG_TWL4030_POWER            /* with TWL4030 PMIC */
  31
  32 #undef CONFIG_USE_IRQ                   /* no support for IRQs */
  33
  34 /*
  35  * Clock related definitions
  36  */
  37 #define V_OSCK                  26000000        /* Clock output from T2 */
  38 #define V_SCLK                  (V_OSCK >> 1)
  39
  40 /*
  41  * OMAP3 has 12 GP timers, they can be driven by the system clock
  42  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  43  * This rate is divided by a local divisor.
  44  */
  45 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
  46 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
  47 #define CONFIG_SYS_HZ                   1000
  48
  49 /* Size of environment - 128KB */
  50 #define CONFIG_ENV_SIZE                 (128 << 10)
  51
  52 /* Size of malloc pool */
  53 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  54
  55 /*
  56  * Stack sizes
  57  * These values are used in start.S
  58  */
  59 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
  60
  61 #ifdef CONFIG_USE_IRQ
  62 #define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
  63 #define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
  64 #endif
  65
  66 /*
  67  * Physical Memory Map
  68  * Note 1: CS1 may or may not be populated
  69  * Note 2: SDRAM size is expected to be at least 32MB
  70  */
  71 #define CONFIG_NR_DRAM_BANKS            2
  72 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
  73 #define PHYS_SDRAM_1_SIZE               (32 << 20)
  74 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
  75
  76 /* SDRAM Bank Allocation method */
  77 #define SDRC_R_B_C
  78
  79 /* Limits for memtest */
  80 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
  81 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
  82                                                 0x01F00000) /* 31MB */
  83
  84 /* Default load address */
  85 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
  86
  87 /* -----------------------------------------------------------------------------
  88  * Hardware drivers
  89  * -----------------------------------------------------------------------------
  90  */
  91
  92 /*
  93  * NS16550 Configuration
  94  */
  95 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  96
  97 #define CONFIG_SYS_NS16550
  98 #define CONFIG_SYS_NS16550_SERIAL
  99 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
 100 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
 101
 102 /*
 103  * select serial console configuration
 104  */
 105 #define CONFIG_CONS_INDEX               1
 106 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
 107 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
 108 #define CONFIG_BAUDRATE                 115200
 109 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 110                                         115200}
 111
 112 /*
 113  * I2C
 114  */
 115 #define CONFIG_HARD_I2C
 116 #define CONFIG_DRIVER_OMAP34XX_I2C
 117
 118 #define CONFIG_SYS_I2C_SPEED            100000
 119 #define CONFIG_SYS_I2C_SLAVE            1
 120 #define CONFIG_SYS_I2C_BUS              0
 121 #define CONFIG_SYS_I2C_BUS_SELECT       1
 122
 123 /*
 124  * PISMO support
 125  */
 126 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 127 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 128
 129 /* Monitor at start of flash - Reserve 2 sectors */
 130 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 131
 132 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 133
 134 /* Start location & size of environment */
 135 #define ONENAND_ENV_OFFSET              0x260000
 136 #define SMNAND_ENV_OFFSET               0x260000
 137
 138 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 139
 140 /*
 141  * NAND
 142  */
 143 /* Physical address to access NAND */
 144 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
 145
 146 /* Physical address to access NAND at CS0 */
 147 #define CONFIG_SYS_NAND_BASE            NAND_BASE
 148
 149 /* Max number of NAND devices */
 150 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 151
 152 /* Timeout values (in ticks) */
 153 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 154 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 155
 156 /* Flash banks JFFS2 should use */
 157 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 158                                                 CONFIG_SYS_MAX_NAND_DEVICE)
 159
 160 #define CONFIG_SYS_JFFS2_MEM_NAND
 161 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 162 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 163
 164 #define CONFIG_JFFS2_NAND
 165 /* nand device jffs2 lives on */
 166 #define CONFIG_JFFS2_DEV                "nand0"
 167 /* Start of jffs2 partition */
 168 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 169 /* Size of jffs2 partition */
 170 #define CONFIG_JFFS2_PART_SIZE          0xf980000
 171
 172 /*
 173  * USB
 174  */
 175 #ifdef CONFIG_USB_OMAP3
 176
 177 #ifdef CONFIG_MUSB_HCD
 178 #define CONFIG_CMD_USB
 179
 180 #define CONFIG_USB_STORAGE
 181 #define CONGIG_CMD_STORAGE
 182 #define CONFIG_CMD_FAT
 183
 184 #ifdef CONFIG_USB_KEYBOARD
 185 #define CONFIG_SYS_USB_EVENT_POLL
 186 #define CONFIG_PREBOOT                  "usb start"
 187 #endif /* CONFIG_USB_KEYBOARD */
 188
 189 #endif /* CONFIG_MUSB_HCD */
 190
 191 #ifdef CONFIG_MUSB_UDC
 192 /* USB device configuration */
 193 #define CONFIG_USB_DEVICE
 194 #define CONFIG_USB_TTY
 195 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 196
 197 /* Change these to suit your needs */
 198 #define CONFIG_USBD_VENDORID            0x0451
 199 #define CONFIG_USBD_PRODUCTID           0x5678
 200 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 201 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
 202 #endif /* CONFIG_MUSB_UDC */
 203
 204 #endif /* CONFIG_USB_OMAP3 */
 205
 206 /* ----------------------------------------------------------------------------
 207  * U-boot features
 208  * ----------------------------------------------------------------------------
 209  */
 210 #define CONFIG_SYS_PROMPT               "OMAP3_EVM # "
 211 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 212 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
 213
 214 #define CONFIG_MISC_INIT_R
 215
 216 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
 217 #define CONFIG_SETUP_MEMORY_TAGS
 218 #define CONFIG_INITRD_TAG
 219 #define CONFIG_REVISION_TAG
 220
 221 /* Size of Console IO buffer */
 222 #define CONFIG_SYS_CBSIZE               512
 223
 224 /* Size of print buffer */
 225 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 226                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 227
 228 /* Size of bootarg buffer */
 229 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 230
 231 #define CONFIG_BOOTFILE                 "uImage"
 232
 233 /*
 234  * NAND / OneNAND
 235  */
 236 #if defined(CONFIG_CMD_NAND)
 237 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 238
 239 #define CONFIG_NAND_OMAP_GPMC
 240 #define GPMC_NAND_ECC_LP_x16_LAYOUT
 241 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 242 #elif defined(CONFIG_CMD_ONENAND)
 243 #define CONFIG_SYS_FLASH_BASE           PISMO1_ONEN_BASE
 244 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 245 #endif
 246
 247 #if !defined(CONFIG_ENV_IS_NOWHERE)
 248 #if defined(CONFIG_CMD_NAND)
 249 #define CONFIG_ENV_IS_IN_NAND
 250 #elif defined(CONFIG_CMD_ONENAND)
 251 #define CONFIG_ENV_IS_IN_ONENAND
 252 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 253 #endif
 254 #endif /* CONFIG_ENV_IS_NOWHERE */
 255
 256 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 257
 258 #if defined(CONFIG_CMD_NET)
 259
 260 /* Ethernet (SMSC9115 from SMSC9118 family) */
 261 #define CONFIG_NET_MULTI
 262 #define CONFIG_SMC911X
 263 #define CONFIG_SMC911X_32_BIT
 264 #define CONFIG_SMC911X_BASE             0x2C000000
 265
 266 /* BOOTP fields */
 267 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 268 #define CONFIG_BOOTP_GATEWAY            0x00000002
 269 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 270 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 271
 272 #endif /* CONFIG_CMD_NET */
 273
 274 /* Support for relocation */
 275 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 276 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 277 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 278 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 279                                          CONFIG_SYS_INIT_RAM_SIZE - \
 280                                          GENERATED_GBL_DATA_SIZE)
 281
 282 /* -----------------------------------------------------------------------------
 283  * Board specific
 284  * -----------------------------------------------------------------------------
 285  */
 286 #define CONFIG_SYS_NO_FLASH
 287
 288 /* Uncomment to define the board revision statically */
 289 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 290
 291 #define CONFIG_SYS_CACHELINE_SIZE       64
 292
 293 #endif /* __OMAP3_EVM_COMMON_H */