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1 /*
2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
4 *
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
6 * reference boards.
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 /*
15 * High Level Configuration Options
16 */
17 #define CONFIG_OMAP /* in a TI OMAP core */
18 #define CONFIG_OMAP34XX /* which is a 34XX */
19 #define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
20 #define CONFIG_OMAP_GPIO
21 #define CONFIG_OMAP_COMMON
22
23 #define CONFIG_SYS_TEXT_BASE 0x80400000
24
25 #define CONFIG_SDRC /* The chip has SDRC controller */
26
27 #include <asm/arch/cpu.h> /* get chip and board defs */
28 #include <asm/arch/omap3.h>
29
30 /*
31 * Display CPU and Board information
32 */
33 #define CONFIG_DISPLAY_CPUINFO
34 #define CONFIG_DISPLAY_BOARDINFO
35
36 /* Clock Defines */
37 #define V_OSCK 26000000 /* Clock output from T2 */
38 #define V_SCLK (V_OSCK >> 1)
39
40 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
41
42 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
43 #define CONFIG_SETUP_MEMORY_TAGS
44 #define CONFIG_INITRD_TAG
45 #define CONFIG_REVISION_TAG
46
47 #define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
48 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */
49
50 /*
51 * Size of malloc() pool
52 */
53 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
54 /* Sector */
55 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
56
57 /*
58 * Hardware drivers
59 */
60
61 /*
62 * NS16550 Configuration
63 */
64 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
65
66 #define CONFIG_SYS_NS16550
67 #define CONFIG_SYS_NS16550_SERIAL
68 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
69 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
70
71 /*
72 * select serial console configuration
73 */
74 #define CONFIG_CONS_INDEX 1
75 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
76 #define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
77
78 /* allow to overwrite serial and ethaddr */
79 #define CONFIG_ENV_OVERWRITE
80 #define CONFIG_BAUDRATE 115200
81 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
82 115200}
83 #define CONFIG_GENERIC_MMC
84 #define CONFIG_MMC
85 #define CONFIG_OMAP_HSMMC
86 #define CONFIG_DOS_PARTITION
87
88 /* commands to include */
89 #include <config_cmd_default.h>
90
91 #define CONFIG_CMD_CACHE
92 #define CONFIG_CMD_EXT2 /* EXT2 Support */
93 #define CONFIG_CMD_FAT /* FAT support */
94 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
95 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
96 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
97 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
98 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\
99 "1920k(u-boot),128k(u-boot-env),"\
100 "4m(kernel),-(fs)"
101
102 #define CONFIG_CMD_I2C /* I2C serial bus support */
103 #define CONFIG_CMD_MMC /* MMC support */
104 #define CONFIG_CMD_NAND /* NAND support */
105 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
106 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
107 #define CONFIG_CMD_PING
108 #define CONFIG_CMD_DHCP
109 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */
110
111 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
112 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
113 #undef CONFIG_CMD_IMI /* iminfo */
114 #undef CONFIG_CMD_IMLS /* List all found images */
115
116 #define CONFIG_SYS_NO_FLASH
117
118 /*
119 * I2C
120 */
121 #define CONFIG_HARD_I2C
122 #define CONFIG_DRIVER_OMAP34XX_I2C
123
124 #define CONFIG_SYS_I2C_SPEED 100000
125 #define CONFIG_SYS_I2C_SLAVE 1
126 #define CONFIG_I2C_MULTI_BUS
127
128 /*
129 * TWL4030
130 */
131 #define CONFIG_TWL4030_POWER
132
133 /*
134 * Board NAND Info.
135 */
136 #define CONFIG_SYS_NAND_QUIET_TEST
137 #define CONFIG_NAND_OMAP_GPMC
138 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
139 /* to access nand */
140 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
141 /* to access nand at */
142 /* CS0 */
143
144 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
145 /* NAND devices */
146 #define CONFIG_JFFS2_NAND
147 /* nand device jffs2 lives on */
148 #define CONFIG_JFFS2_DEV "nand0"
149 /* start of jffs2 partition */
150 #define CONFIG_JFFS2_PART_OFFSET 0x680000
151 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
152 /* partition */
153
154 /* Environment information */
155 #define CONFIG_BOOTDELAY 2
156
157 /*
158 * PREBOOT assumes the 4.3" display is attached. User can interrupt
159 * and modify display variable to suit their needs.
160 */
161 #define CONFIG_PREBOOT \
162 "echo ======================NOTICE============================;"\
163 "echo \"The u-boot environment is not set.\";" \
164 "echo \"If using a display a valid display varible for your panel\";" \
165 "echo \"needs to be set.\";" \
166 "echo \"Valid display options are:\";" \
167 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
168 "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
169 "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
170 "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
171 "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
172 "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
173 "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
174 "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
175 "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
176 "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
177 "setenv display 15;" \
178 "setenv preboot;" \
179 "saveenv;"
180
181
182 #define CONFIG_EXTRA_ENV_SETTINGS \
183 "loadaddr=0x81000000\0" \
184 "bootfile=uImage\0" \
185 "mtdids=" MTDIDS_DEFAULT "\0" \
186 "mtdparts=" MTDPARTS_DEFAULT "\0" \
187 "mmcdev=0\0" \
188 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
189 "if run loadbootscript; then " \
190 "run bootscript; " \
191 "else " \
192 "run defaultboot;" \
193 "fi; " \
194 "else run defaultboot; fi\0" \
195 "defaultboot=run mmcramboot\0" \
196 "consoledevice=ttyO0\0" \
197 "display=15\0" \
198 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
199 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
200 "rotation=0\0" \
201 "vrfb_arg=if itest ${rotation} -ne 0; then " \
202 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
203 "omapfb.rotate=${rotation}; " \
204 "fi\0" \
205 "otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
206 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
207 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \
208 "${otherbootargs};" \
209 "run addmtdparts; " \
210 "run vrfb_arg\0" \
211 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
212 "bootscript=echo 'Running bootscript from mmc ...'; " \
213 "source ${loadaddr}\0" \
214 "loaduimage=mmc rescan ${mmcdev}; " \
215 "fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
216 "ramdisksize=64000\0" \
217 "ramdiskaddr=0x82000000\0" \
218 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
219 "ramargs=run setconsole; setenv bootargs console=${console} " \
220 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
221 "mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
222 "run ramargs; " \
223 "run common_bootargs; " \
224 "run dump_bootargs; " \
225 "run loaduimage; " \
226 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
227 "bootm ${loadaddr} ${ramdiskaddr}\0" \
228 "ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
229 "run ramargs; " \
230 "run common_bootargs; " \
231 "run dump_bootargs; " \
232 "tftpboot ${loadaddr} ${bootfile}; "\
233 "tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
234 "bootm ${loadaddr} ${ramdiskaddr}\0"
235
236 #define CONFIG_BOOTCOMMAND \
237 "run autoboot"
238
239 #define CONFIG_AUTO_COMPLETE
240 /*
241 * Miscellaneous configurable options
242 */
243 #define CONFIG_SYS_LONGHELP /* undef to save memory */
244 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
245 #define CONFIG_SYS_PROMPT "OMAP Logic # "
246 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
247 /* Print Buffer Size */
248 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
249 sizeof(CONFIG_SYS_PROMPT) + 16)
250 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
251 /* Boot Argument Buffer Size */
252 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
253 /* memtest works on */
254 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
255 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
256 0x01F00000) /* 31MB */
257
258 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
259 /* address */
260
261 /*
262 * OMAP3 has 12 GP timers, they can be driven by the system clock
263 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
264 * This rate is divided by a local divisor.
265 */
266 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
267 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
268 #define CONFIG_SYS_HZ 1000
269
270 /*
271 * Physical Memory Map
272 */
273 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
274 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
275 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
276
277 /*
278 * FLASH and environment organization
279 */
280
281 /* **** PISMO SUPPORT *** */
282
283 /* Configure the PISMO */
284 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
285
286 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
287
288 #if defined(CONFIG_CMD_NAND)
289 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
290 #elif defined(CONFIG_CMD_ONENAND)
291 #define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE
292 #endif
293
294 /* Monitor at start of flash */
295 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
296
297 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
298
299 #if defined(CONFIG_CMD_NAND)
300 #define CONFIG_NAND_OMAP_GPMC
301 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
302 #define CONFIG_ENV_IS_IN_NAND
303 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
304 #endif
305
306 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
307 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
308
309 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
310 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
311 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
312 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
313 CONFIG_SYS_INIT_RAM_SIZE - \
314 GENERATED_GBL_DATA_SIZE)
315
316 /*
317 * SMSC922x Ethernet
318 */
319 #if defined(CONFIG_CMD_NET)
320
321 #define CONFIG_SMC911X
322 #define CONFIG_SMC911X_16_BIT
323 #define CONFIG_SMC911X_BASE 0x08000000
324
325 #endif /* (CONFIG_CMD_NET) */
326
327 /*
328 * BOOTP fields
329 */
330
331 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
332 #define CONFIG_BOOTP_GATEWAY 0x00000002
333 #define CONFIG_BOOTP_HOSTNAME 0x00000004
334 #define CONFIG_BOOTP_BOOTPATH 0x00000010
335
336 #endif /* __CONFIG_H */