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include/configs/omap3_overo.h: several cleanups
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1 /*
2 * Configuration settings for the Gumstix Overo board.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc.
17 */
18
19 #ifndef __CONFIG_H
20 #define __CONFIG_H
21
22 /*
23 * High Level Configuration Options
24 */
25 #define CONFIG_OMAP /* in a TI OMAP core */
26 #define CONFIG_OMAP34XX /* which is a 34XX */
27 #define CONFIG_OMAP3_OVERO /* working with overo */
28
29 #define CONFIG_SDRC /* The chip has SDRC controller */
30
31 #include <asm/arch/cpu.h> /* get chip and board defs */
32 #include <asm/arch/omap3.h>
33
34 /*
35 * Display CPU and Board information
36 */
37 #define CONFIG_DISPLAY_CPUINFO
38 #define CONFIG_DISPLAY_BOARDINFO
39
40 /* Clock Defines */
41 #define V_OSCK 26000000 /* Clock output from T2 */
42 #define V_SCLK (V_OSCK >> 1)
43
44 #undef CONFIG_USE_IRQ /* no support for IRQs */
45 #define CONFIG_MISC_INIT_R
46
47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS
49 #define CONFIG_INITRD_TAG
50 #define CONFIG_REVISION_TAG
51
52 #define CONFIG_OF_LIBFDT
53
54 /*
55 * Size of malloc() pool
56 */
57 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
58 /* Sector */
59 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
60
61 /*
62 * Hardware drivers
63 */
64
65 /*
66 * NS16550 Configuration
67 */
68 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
69
70 #define CONFIG_SYS_NS16550
71 #define CONFIG_SYS_NS16550_SERIAL
72 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
73 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
74
75 /*
76 * select serial console configuration
77 */
78 #define CONFIG_CONS_INDEX 3
79 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
80 #define CONFIG_SERIAL3 3
81
82 /* allow to overwrite serial and ethaddr */
83 #define CONFIG_ENV_OVERWRITE
84 #define CONFIG_BAUDRATE 115200
85 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
86 115200}
87 #define CONFIG_GENERIC_MMC
88 #define CONFIG_MMC
89 #define CONFIG_OMAP_HSMMC
90 #define CONFIG_DOS_PARTITION
91
92 /* commands to include */
93 #include <config_cmd_default.h>
94
95 #define CONFIG_CMD_CACHE
96 #define CONFIG_CMD_EXT2 /* EXT2 Support */
97 #define CONFIG_CMD_FAT /* FAT support */
98 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
99
100 #define CONFIG_CMD_I2C /* I2C serial bus support */
101 #define CONFIG_CMD_MMC /* MMC support */
102 #define CONFIG_CMD_NAND /* NAND support */
103
104 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
105 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
106 #undef CONFIG_CMD_IMI /* iminfo */
107 #undef CONFIG_CMD_IMLS /* List all found images */
108 #undef CONFIG_CMD_NFS /* NFS support */
109 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
110
111 #define CONFIG_SYS_NO_FLASH
112 #define CONFIG_HARD_I2C
113 #define CONFIG_SYS_I2C_SPEED 100000
114 #define CONFIG_SYS_I2C_SLAVE 1
115 #define CONFIG_I2C_MULTI_BUS
116 #define CONFIG_DRIVER_OMAP34XX_I2C
117
118 /*
119 * TWL4030
120 */
121 #define CONFIG_TWL4030_POWER
122 #define CONFIG_TWL4030_LED
123
124 /*
125 * Board NAND Info.
126 */
127 #define CONFIG_SYS_NAND_QUIET_TEST
128 #define CONFIG_NAND_OMAP_GPMC
129 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
130 /* to access nand */
131 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
132 /* to access nand */
133 /* at CS0 */
134 #define GPMC_NAND_ECC_LP_x16_LAYOUT
135
136 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
137 /* devices */
138 #define CONFIG_JFFS2_NAND
139 /* nand device jffs2 lives on */
140 #define CONFIG_JFFS2_DEV "nand0"
141 /* start of jffs2 partition */
142 #define CONFIG_JFFS2_PART_OFFSET 0x680000
143 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
144 /* partition */
145
146 /* Environment information */
147 #define CONFIG_BOOTDELAY 5
148
149 #define CONFIG_EXTRA_ENV_SETTINGS \
150 "loadaddr=0x82000000\0" \
151 "console=ttyO2,115200n8\0" \
152 "mpurate=500\0" \
153 "optargs=\0" \
154 "vram=12M\0" \
155 "dvimode=1024x768MR-16@60\0" \
156 "defaultdisplay=dvi\0" \
157 "mmcdev=0\0" \
158 "mmcroot=/dev/mmcblk0p2 rw\0" \
159 "mmcrootfstype=ext3 rootwait\0" \
160 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
161 "nandrootfstype=ubifs\0" \
162 "mmcargs=setenv bootargs console=${console} " \
163 "${optargs} " \
164 "mpurate=${mpurate} " \
165 "vram=${vram} " \
166 "omapfb.mode=dvi:${dvimode} " \
167 "omapdss.def_disp=${defaultdisplay} " \
168 "root=${mmcroot} " \
169 "rootfstype=${mmcrootfstype}\0" \
170 "nandargs=setenv bootargs console=${console} " \
171 "${optargs} " \
172 "mpurate=${mpurate} " \
173 "vram=${vram} " \
174 "omapfb.mode=dvi:${dvimode} " \
175 "omapdss.def_disp=${defaultdisplay} " \
176 "root=${nandroot} " \
177 "rootfstype=${nandrootfstype}\0" \
178 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
179 "bootscript=echo Running bootscript from mmc ...; " \
180 "source ${loadaddr}\0" \
181 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
182 "mmcboot=echo Booting from mmc ...; " \
183 "run mmcargs; " \
184 "bootm ${loadaddr}\0" \
185 "nandboot=echo Booting from nand ...; " \
186 "run nandargs; " \
187 "nand read ${loadaddr} 280000 400000; " \
188 "bootm ${loadaddr}\0" \
189
190 #define CONFIG_BOOTCOMMAND \
191 "if mmc rescan ${mmcdev}; then " \
192 "if run loadbootscript; then " \
193 "run bootscript; " \
194 "else " \
195 "if run loaduimage; then " \
196 "run mmcboot; " \
197 "else run nandboot; " \
198 "fi; " \
199 "fi; " \
200 "else run nandboot; fi"
201
202 #define CONFIG_AUTO_COMPLETE 1
203 /*
204 * Miscellaneous configurable options
205 */
206 #define CONFIG_SYS_LONGHELP /* undef to save memory */
207 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
208 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
209 #define CONFIG_SYS_PROMPT "Overo # "
210 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
211 /* Print Buffer Size */
212 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
213 sizeof(CONFIG_SYS_PROMPT) + 16)
214 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
215 /* args */
216 /* Boot Argument Buffer Size */
217 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
218 /* memtest works on */
219 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
220 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
221 0x01F00000) /* 31MB */
222
223 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
224 /* address */
225 /*
226 * OMAP3 has 12 GP timers, they can be driven by the system clock
227 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
228 * This rate is divided by a local divisor.
229 */
230 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
231 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
232 #define CONFIG_SYS_HZ 1000
233
234 /*-----------------------------------------------------------------------
235 * Stack sizes
236 *
237 * The stack sizes are set up in start.S using the settings below
238 */
239 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
240
241 /*-----------------------------------------------------------------------
242 * Physical Memory Map
243 */
244 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
245 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
246 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
247
248 /*-----------------------------------------------------------------------
249 * FLASH and environment organization
250 */
251
252 /* **** PISMO SUPPORT *** */
253
254 /* Configure the PISMO */
255 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
256 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
257
258 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
259
260 #if defined(CONFIG_CMD_NAND)
261 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
262 #endif
263
264 /* Monitor at start of flash */
265 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
266 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
267
268 #define CONFIG_ENV_IS_IN_NAND
269 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
270 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
271
272 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
273 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
274 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
275
276 #if defined(CONFIG_CMD_NET)
277 /*----------------------------------------------------------------------------
278 * SMSC9211 Ethernet from SMSC9118 family
279 *----------------------------------------------------------------------------
280 */
281
282 #define CONFIG_SMC911X
283 #define CONFIG_SMC911X_32_BIT
284 #define CONFIG_SMC911X_BASE 0x2C000000
285
286 #endif /* (CONFIG_CMD_NET) */
287
288 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
289 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
290 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
291 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
292 CONFIG_SYS_INIT_RAM_SIZE - \
293 GENERATED_GBL_DATA_SIZE)
294
295 #define CONFIG_SYS_CACHELINE_SIZE 64
296
297 #endif /* __CONFIG_H */