include/configs/omap3_pandora.h

   1 /*
   2  * (C) Copyright 2008-2010
   3  * Gražvydas Ignotas <notasas@gmail.com>
   4  *
   5  * Configuration settings for the OMAP3 Pandora.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #ifndef __CONFIG_H
  24 #define __CONFIG_H
  25
  26 /*
  27  * High Level Configuration Options
  28  */
  29 #define CONFIG_ARMV7            1       /* This is an ARM V7 CPU core */
  30 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  31 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  32 #define CONFIG_OMAP3430         1       /* which is in a 3430 */
  33 #define CONFIG_OMAP3_PANDORA    1       /* working with pandora */
  34
  35 #define CONFIG_SDRC     /* The chip has SDRC controller */
  36
  37 #include <asm/arch/cpu.h>       /* get chip and board defs */
  38 #include <asm/arch/omap3.h>
  39
  40 /*
  41  * Display CPU and Board information
  42  */
  43 #define CONFIG_DISPLAY_CPUINFO          1
  44 #define CONFIG_DISPLAY_BOARDINFO        1
  45
  46 /* Clock Defines */
  47 #define V_OSCK                  26000000        /* Clock output from T2 */
  48 #define V_SCLK                  (V_OSCK >> 1)
  49
  50 #undef CONFIG_USE_IRQ           /* no support for IRQs */
  51 #define CONFIG_MISC_INIT_R
  52
  53 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  54 #define CONFIG_SETUP_MEMORY_TAGS        1
  55 #define CONFIG_INITRD_TAG               1
  56 #define CONFIG_REVISION_TAG             1
  57
  58 /*
  59  * Size of malloc() pool
  60  */
  61 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  62 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024 + CONFIG_ENV_SIZE)
  63
  64 /*
  65  * Hardware drivers
  66  */
  67
  68 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
  69 #define CONFIG_SYS_DEVICE_NULLDEV       1
  70
  71 /* USB */
  72 #define CONFIG_MUSB_UDC                 1
  73 #define CONFIG_USB_OMAP3                1
  74 #define CONFIG_TWL4030_USB              1
  75
  76 /* USB device configuration */
  77 #define CONFIG_USB_DEVICE               1
  78 #define CONFIG_USB_TTY                  1
  79
  80 /*
  81  * NS16550 Configuration
  82  */
  83 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  84
  85 #define CONFIG_SYS_NS16550
  86 #define CONFIG_SYS_NS16550_SERIAL
  87 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  88 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  89
  90 /*
  91  * select serial console configuration
  92  */
  93 #define CONFIG_CONS_INDEX               3
  94 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  95 #define CONFIG_SERIAL3                  3
  96
  97 /* allow to overwrite serial and ethaddr */
  98 #define CONFIG_ENV_OVERWRITE
  99 #define CONFIG_BAUDRATE                 115200
 100 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
 101                                         115200}
 102 #define CONFIG_MMC                      1
 103 #define CONFIG_OMAP3_MMC                1
 104 #define CONFIG_DOS_PARTITION            1
 105
 106 /* DDR - I use Micron DDR */
 107 #define CONFIG_OMAP3_MICRON_DDR         1
 108
 109 /* commands to include */
 110 #include <config_cmd_default.h>
 111
 112 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 113 #define CONFIG_CMD_FAT          /* FAT support                  */
 114
 115 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 116 #define CONFIG_CMD_MMC          /* MMC support                  */
 117 #define CONFIG_CMD_NAND         /* NAND support                 */
 118 #define CONFIG_CMD_CACHE        /* Cache control                */
 119
 120 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 121 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 122 #undef CONFIG_CMD_IMI           /* iminfo                       */
 123 #undef CONFIG_CMD_IMLS          /* List all found images        */
 124 #undef CONFIG_CMD_NET           /* bootp, tftpboot, rarpboot    */
 125 #undef CONFIG_CMD_NFS           /* NFS support                  */
 126
 127 #define CONFIG_SYS_NO_FLASH
 128 #define CONFIG_HARD_I2C                 1
 129 #define CONFIG_SYS_I2C_SPEED            100000
 130 #define CONFIG_SYS_I2C_SLAVE            1
 131 #define CONFIG_SYS_I2C_BUS              0
 132 #define CONFIG_SYS_I2C_BUS_SELECT       1
 133 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 134
 135 /*
 136  * TWL4030
 137  */
 138 #define CONFIG_TWL4030_POWER            1
 139 #define CONFIG_TWL4030_LED              1
 140
 141 /*
 142  * Board NAND Info.
 143  */
 144 #define CONFIG_NAND_OMAP_GPMC
 145 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 146                                                         /* to access nand */
 147 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 148                                                         /* to access nand */
 149                                                         /* at CS0 */
 150 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 151
 152 #define CONFIG_SYS_MAX_NAND_DEVICE      1       /* Max number of NAND */
 153                                                 /* devices */
 154
 155 #ifdef CONFIG_CMD_NAND
 156 #define CONFIG_CMD_MTDPARTS
 157 #define CONFIG_MTD_PARTITIONS
 158 #define CONFIG_MTD_DEVICE
 159 #define CONFIG_CMD_UBI
 160 #define CONFIG_CMD_UBIFS
 161 #define CONFIG_RBTREE
 162 #define CONFIG_LZO
 163
 164 #define MTDIDS_DEFAULT                  "nand0=nand"
 165 #define MTDPARTS_DEFAULT                "mtdparts=nand:512k(xloader),"\
 166                                         "1920k(uboot),128k(uboot-env),"\
 167                                         "10m(boot),-(rootfs)"
 168 #else
 169 #define MTDPARTS_DEFAULT
 170 #endif
 171
 172 /* Environment information */
 173 #define CONFIG_BOOTDELAY                1
 174
 175 #define CONFIG_EXTRA_ENV_SETTINGS \
 176         "usbtty=cdc_acm\0" \
 177         "loadaddr=0x82000000\0" \
 178         "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
 179         "rw rootflags=bulk_read console=ttyS0,115200n8 " \
 180         "vram=6272K omapfb.vram=0:3000K\0" \
 181         "mtdparts=" MTDPARTS_DEFAULT "\0" \
 182
 183 #define CONFIG_BOOTCOMMAND \
 184         "if mmc init && fatload mmc1 0 ${loadaddr} autoboot.scr || " \
 185                         "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
 186                 "source ${loadaddr}; " \
 187         "fi; " \
 188         "ubi part boot && ubifsmount boot && ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
 189
 190 #define CONFIG_AUTO_COMPLETE    1
 191 /*
 192  * Miscellaneous configurable options
 193  */
 194 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 195 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 196 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 197 #define CONFIG_SYS_PROMPT               "Pandora # "
 198 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 199 /* Print Buffer Size */
 200 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 201                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 202 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
 203                                                 /* args */
 204 /* Boot Argument Buffer Size */
 205 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 206 /* memtest works on */
 207 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 208 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 209                                         0x01F00000) /* 31MB */
 210
 211 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 212                                                                 /* address */
 213
 214 /*
 215  * OMAP3 has 12 GP timers, they can be driven by the system clock
 216  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 217  * This rate is divided by a local divisor.
 218  */
 219 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 220 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 221 #define CONFIG_SYS_HZ                   1000
 222
 223 /*-----------------------------------------------------------------------
 224  * Stack sizes
 225  *
 226  * The stack sizes are set up in start.S using the settings below
 227  */
 228 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 229 #ifdef CONFIG_USE_IRQ
 230 #define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
 231 #define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
 232 #endif
 233
 234 /*-----------------------------------------------------------------------
 235  * Physical Memory Map
 236  */
 237 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 238 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 239 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 240 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 241
 242 /* SDRAM Bank Allocation method */
 243 #define SDRC_R_B_C              1
 244
 245 #define CONFIG_SYS_TEXT_BASE            0x80008000
 246 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 247 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 248 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 249 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 250                                         CONFIG_SYS_INIT_RAM_SIZE - \
 251                                         GENERATED_GBL_DATA_SIZE)
 252
 253 /*-----------------------------------------------------------------------
 254  * FLASH and environment organization
 255  */
 256
 257 /* **** PISMO SUPPORT *** */
 258
 259 /* Configure the PISMO */
 260 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 261 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 262
 263 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 264
 265 #if defined(CONFIG_CMD_NAND)
 266 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 267 #endif
 268
 269 /* Monitor at start of flash */
 270 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 271
 272 #define CONFIG_ENV_IS_IN_NAND           1
 273 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 274
 275 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 276 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 277 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 278
 279 #endif                          /* __CONFIG_H */