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1 /*
2 * (C) Copyright 2008-2010
3 * GraÅžvydas Ignotas <notasas@gmail.com>
4 *
5 * Configuration settings for the OMAP3 Pandora.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23 #ifndef __CONFIG_H
24 #define __CONFIG_H
25
26 /*
27 * High Level Configuration Options
28 */
29 #define CONFIG_OMAP 1 /* in a TI OMAP core */
30 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
31 #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
32
33 #define CONFIG_SDRC /* The chip has SDRC controller */
34
35 #include <asm/arch/cpu.h> /* get chip and board defs */
36 #include <asm/arch/omap3.h>
37
38 /*
39 * Display CPU and Board information
40 */
41 #define CONFIG_DISPLAY_CPUINFO 1
42 #define CONFIG_DISPLAY_BOARDINFO 1
43
44 /* Clock Defines */
45 #define V_OSCK 26000000 /* Clock output from T2 */
46 #define V_SCLK (V_OSCK >> 1)
47
48 #undef CONFIG_USE_IRQ /* no support for IRQs */
49 #define CONFIG_MISC_INIT_R
50
51 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
52 #define CONFIG_SETUP_MEMORY_TAGS 1
53 #define CONFIG_INITRD_TAG 1
54 #define CONFIG_REVISION_TAG 1
55
56 #define CONFIG_OF_LIBFDT 1
57
58 /*
59 * Size of malloc() pool
60 */
61 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
62 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
63
64 /*
65 * Hardware drivers
66 */
67
68 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
69 #define CONFIG_SYS_DEVICE_NULLDEV 1
70
71 /* USB */
72 #define CONFIG_MUSB_UDC 1
73 #define CONFIG_USB_OMAP3 1
74 #define CONFIG_TWL4030_USB 1
75
76 /* USB device configuration */
77 #define CONFIG_USB_DEVICE 1
78 #define CONFIG_USB_TTY 1
79
80 /*
81 * NS16550 Configuration
82 */
83 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
84
85 #define CONFIG_SYS_NS16550
86 #define CONFIG_SYS_NS16550_SERIAL
87 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
88 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
89
90 /*
91 * select serial console configuration
92 */
93 #define CONFIG_CONS_INDEX 3
94 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
95 #define CONFIG_SERIAL3 3
96
97 /* allow to overwrite serial and ethaddr */
98 #define CONFIG_ENV_OVERWRITE
99 #define CONFIG_BAUDRATE 115200
100 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
101 115200}
102 #define CONFIG_GENERIC_MMC 1
103 #define CONFIG_MMC 1
104 #define CONFIG_OMAP_HSMMC 1
105 #define CONFIG_DOS_PARTITION 1
106
107 /* commands to include */
108 #include <config_cmd_default.h>
109
110 #define CONFIG_CMD_EXT2 /* EXT2 Support */
111 #define CONFIG_CMD_FAT /* FAT support */
112
113 #define CONFIG_CMD_I2C /* I2C serial bus support */
114 #define CONFIG_CMD_MMC /* MMC support */
115 #define CONFIG_CMD_NAND /* NAND support */
116 #define CONFIG_CMD_CACHE /* Cache control */
117
118 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
119 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
120 #undef CONFIG_CMD_IMI /* iminfo */
121 #undef CONFIG_CMD_IMLS /* List all found images */
122 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
123 #undef CONFIG_CMD_NFS /* NFS support */
124
125 #define CONFIG_SYS_NO_FLASH
126 #define CONFIG_HARD_I2C 1
127 #define CONFIG_SYS_I2C_SPEED 100000
128 #define CONFIG_SYS_I2C_SLAVE 1
129 #define CONFIG_SYS_I2C_BUS 0
130 #define CONFIG_SYS_I2C_BUS_SELECT 1
131 #define CONFIG_DRIVER_OMAP34XX_I2C 1
132
133 /*
134 * TWL4030
135 */
136 #define CONFIG_TWL4030_POWER 1
137 #define CONFIG_TWL4030_LED 1
138
139 /*
140 * Board NAND Info.
141 */
142 #define CONFIG_NAND_OMAP_GPMC
143 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
144 /* to access nand */
145 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
146 /* to access nand */
147 /* at CS0 */
148 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
149
150 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
151 /* devices */
152
153 #ifdef CONFIG_CMD_NAND
154 #define CONFIG_CMD_MTDPARTS
155 #define CONFIG_MTD_PARTITIONS
156 #define CONFIG_MTD_DEVICE
157 #define CONFIG_CMD_UBI
158 #define CONFIG_CMD_UBIFS
159 #define CONFIG_RBTREE
160 #define CONFIG_LZO
161
162 #define MTDIDS_DEFAULT "nand0=nand"
163 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\
164 "1920k(uboot),128k(uboot-env),"\
165 "10m(boot),-(rootfs)"
166 #else
167 #define MTDPARTS_DEFAULT
168 #endif
169
170 /* Environment information */
171 #define CONFIG_BOOTDELAY 1
172
173 #define CONFIG_EXTRA_ENV_SETTINGS \
174 "usbtty=cdc_acm\0" \
175 "loadaddr=0x82000000\0" \
176 "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
177 "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
178 "mtdparts=" MTDPARTS_DEFAULT "\0" \
179
180 #define CONFIG_BOOTCOMMAND \
181 "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \
182 "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
183 "source ${loadaddr}; " \
184 "fi; " \
185 "ubi part boot && ubifsmount boot && ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
186
187 #define CONFIG_AUTO_COMPLETE 1
188 /*
189 * Miscellaneous configurable options
190 */
191 #define CONFIG_SYS_LONGHELP /* undef to save memory */
192 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
193 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
194 #define CONFIG_SYS_PROMPT "Pandora # "
195 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
196 /* Print Buffer Size */
197 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
198 sizeof(CONFIG_SYS_PROMPT) + 16)
199 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
200 /* args */
201 /* Boot Argument Buffer Size */
202 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
203 /* memtest works on */
204 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
205 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
206 0x01F00000) /* 31MB */
207
208 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
209 /* address */
210
211 /*
212 * OMAP3 has 12 GP timers, they can be driven by the system clock
213 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
214 * This rate is divided by a local divisor.
215 */
216 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
217 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
218 #define CONFIG_SYS_HZ 1000
219
220 /*-----------------------------------------------------------------------
221 * Stack sizes
222 *
223 * The stack sizes are set up in start.S using the settings below
224 */
225 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
226
227 /*-----------------------------------------------------------------------
228 * Physical Memory Map
229 */
230 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
231 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
232 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
233 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
234
235 #define CONFIG_SYS_TEXT_BASE 0x80008000
236 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
237 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
238 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
239 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
240 CONFIG_SYS_INIT_RAM_SIZE - \
241 GENERATED_GBL_DATA_SIZE)
242
243 /*-----------------------------------------------------------------------
244 * FLASH and environment organization
245 */
246
247 /* **** PISMO SUPPORT *** */
248
249 /* Configure the PISMO */
250 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
251 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
252
253 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
254
255 #if defined(CONFIG_CMD_NAND)
256 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
257 #endif
258
259 /* Monitor at start of flash */
260 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
261
262 #define CONFIG_ENV_IS_IN_NAND 1
263 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
264
265 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
266 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
267 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
268
269 #define CONFIG_SYS_CACHELINE_SIZE 64
270
271 #endif /* __CONFIG_H */