include/configs/omap3_zoom2.h

   1 /*
   2  * (C) Copyright 2006-2009
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Syed Mohammed Khasim <x0khasim@ti.com>
   6  * Nishanth Menon <nm@ti.com>
   7  * Tom Rix <Tom.Rix@windriver.com>
   8  *
   9  * Configuration settings for the TI OMAP3430 Zoom II board.
  10  *
  11  * See file CREDITS for list of people who contributed to this
  12  * project.
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License as
  16  * published by the Free Software Foundation; either version 2 of
  17  * the License, or (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27  * MA 02111-1307 USA
  28  */
  29
  30 #ifndef __CONFIG_H
  31 #define __CONFIG_H
  32
  33 /*
  34  * High Level Configuration Options
  35  */
  36 #define CONFIG_ARMV7            1       /* This is an ARM V7 CPU core */
  37 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  38 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  39 #define CONFIG_OMAP3430         1       /* which is in a 3430 */
  40 #define CONFIG_OMAP3_ZOOM2      1       /* working with Zoom II */
  41
  42 #define CONFIG_SDRC     /* The chip has SDRC controller */
  43
  44 #include <asm/arch/cpu.h>       /* get chip and board defs */
  45 #include <asm/arch/omap3.h>
  46
  47 /*
  48  * Display CPU and Board information
  49  */
  50 #define CONFIG_DISPLAY_CPUINFO          1
  51 #define CONFIG_DISPLAY_BOARDINFO        1
  52
  53 /* Clock Defines */
  54 #define V_OSCK                  26000000        /* Clock output from T2 */
  55 #define V_SCLK                  (V_OSCK >> 1)
  56
  57 #undef CONFIG_USE_IRQ           /* no support for IRQs */
  58 #define CONFIG_MISC_INIT_R
  59
  60 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  61 #define CONFIG_SETUP_MEMORY_TAGS        1
  62 #define CONFIG_INITRD_TAG               1
  63 #define CONFIG_REVISION_TAG             1
  64
  65 #define CONFIG_OF_LIBFDT                1
  66
  67 /*
  68  * Size of malloc() pool
  69  */
  70 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  71                                                 /* Sector */
  72 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  73                                                 /* initial data */
  74 /*
  75  * Hardware drivers
  76  */
  77
  78 /*
  79  * NS16550 Configuration
  80  * Zoom2 uses the TL16CP754C on the debug board
  81  */
  82 #define CONFIG_SERIAL_MULTI             1
  83 /*
  84  * 0 - 1 : first  USB with respect to the left edge of the debug board
  85  * 2 - 3 : second USB with respect to the left edge of the debug board
  86  */
  87 #define ZOOM2_DEFAULT_SERIAL_DEVICE     (&zoom2_serial_device0)
  88
  89 #define V_NS16550_CLK                   (1843200)       /* 1.8432 Mhz */
  90
  91 #define CONFIG_SYS_NS16550
  92 #define CONFIG_SYS_NS16550_REG_SIZE     (-2)
  93 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  94 #define CONFIG_BAUDRATE                 115200
  95 #define CONFIG_SYS_BAUDRATE_TABLE       {115200}
  96
  97 /* allow to overwrite serial and ethaddr */
  98 #define CONFIG_ENV_OVERWRITE
  99
 100 #define CONFIG_MMC                      1
 101 #define CONFIG_OMAP3_MMC                1
 102 #define CONFIG_DOS_PARTITION            1
 103
 104 /* DDR - I use Micron DDR */
 105 #define CONFIG_OMAP3_MICRON_DDR         1
 106
 107 /* Status LED */
 108 #define CONFIG_STATUS_LED               1 /* Status LED enabled */
 109 #define CONFIG_BOARD_SPECIFIC_LED       1
 110 #define STATUS_LED_BLUE                 0
 111 #define STATUS_LED_RED                  1
 112 /* Blue */
 113 #define STATUS_LED_BIT                  STATUS_LED_BLUE
 114 #define STATUS_LED_STATE                STATUS_LED_ON
 115 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
 116 /* Red */
 117 #define STATUS_LED_BIT1                 STATUS_LED_RED
 118 #define STATUS_LED_STATE1               STATUS_LED_OFF
 119 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
 120 /* Optional value */
 121 #define STATUS_LED_BOOT                 STATUS_LED_BIT
 122
 123 /* GPIO banks */
 124 #ifdef CONFIG_STATUS_LED
 125 #define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */
 126 #define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */
 127 #endif
 128 #define CONFIG_OMAP3_GPIO_3 /* board revision */
 129 #define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */
 130
 131 /* USB */
 132 #define CONFIG_MUSB_UDC                 1
 133 #define CONFIG_USB_OMAP3                1
 134 #define CONFIG_TWL4030_USB              1
 135
 136 /* USB device configuration */
 137 #define CONFIG_USB_DEVICE               1
 138 #define CONFIG_USB_TTY                  1
 139 /* Change these to suit your needs */
 140 #define CONFIG_USBD_VENDORID            0x0451
 141 #define CONFIG_USBD_PRODUCTID           0x5678
 142 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 143 #define CONFIG_USBD_PRODUCT_NAME        "Zoom2"
 144
 145 /* commands to include */
 146 #include <config_cmd_default.h>
 147
 148 #define CONFIG_CMD_FAT                  /* FAT support                  */
 149 #define CONFIG_CMD_I2C                  /* I2C serial bus support       */
 150 #define CONFIG_CMD_MMC                  /* MMC support                  */
 151 #define CONFIG_CMD_NAND                 /* NAND support                 */
 152 #define CONFIG_CMD_NAND_LOCK_UNLOCK     /* Enable lock/unlock support   */
 153
 154 #undef CONFIG_CMD_FLASH                 /* flinfo, erase, protect       */
 155 #undef CONFIG_CMD_FPGA                  /* FPGA configuration Support   */
 156 #undef CONFIG_CMD_IMI                   /* iminfo                       */
 157 #undef CONFIG_CMD_IMLS                  /* List all found images        */
 158 #undef CONFIG_CMD_NET                   /* bootp, tftpboot, rarpboot    */
 159 #undef CONFIG_CMD_NFS                   /* NFS support                  */
 160
 161 #define CONFIG_SYS_NO_FLASH
 162 #define CONFIG_HARD_I2C                 1
 163 #define CONFIG_SYS_I2C_SPEED            100000
 164 #define CONFIG_SYS_I2C_SLAVE            1
 165 #define CONFIG_SYS_I2C_BUS              0
 166 #define CONFIG_SYS_I2C_BUS_SELECT       1
 167 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 168
 169 /*
 170  * TWL4030
 171  */
 172 #define CONFIG_TWL4030_POWER            1
 173 #define CONFIG_TWL4030_LED              1
 174
 175 /*
 176  * Board NAND Info.
 177  */
 178 #define CONFIG_NAND_OMAP_GPMC
 179 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 180                                                         /* to access nand */
 181 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 182                                                         /* to access nand at */
 183                                                         /* CS0 */
 184 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 185 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 186
 187 /* Environment information */
 188 #define CONFIG_BOOTDELAY                10
 189
 190 #define CONFIG_EXTRA_ENV_SETTINGS \
 191         "usbtty=cdc_acm\0" \
 192
 193 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 194 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 195 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 196 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 197                                          CONFIG_SYS_INIT_RAM_SIZE - \
 198                                          GENERATED_GBL_DATA_SIZE)
 199 /*
 200  * Miscellaneous configurable options
 201  */
 202
 203 #define CONFIG_SYS_PROMPT               "OMAP3 Zoom2 # "
 204 #define CONFIG_SYS_LONGHELP
 205 #define CONFIG_SYS_CBSIZE               256
 206 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 207                                          sizeof(CONFIG_SYS_PROMPT) + 16)
 208 #define CONFIG_SYS_MAXARGS              16
 209 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 210 /* Memtest from start of memory to 31MB */
 211 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 212 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + 0x01F00000)
 213 /* The default load address is the start of memory */
 214 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
 215 /* everything, incl board info, in Hz */
 216 #undef CONFIG_SYS_CLKS_IN_HZ
 217 /*
 218  * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
 219  * 32KHz clk, or from external sig. This rate is divided by a local divisor.
 220  */
 221 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 222 #define CONFIG_SYS_PTV                  7       /* 2^(PTV+1) */
 223 #define CONFIG_SYS_HZ                   ((V_SCLK) / (2 << CONFIG_SYS_PTV))
 224
 225 /*-----------------------------------------------------------------------
 226  * Stack sizes
 227  *
 228  * The stack sizes are set up in start.S using these settings
 229  */
 230 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 231 #ifdef CONFIG_USE_IRQ
 232 #define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
 233 #define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
 234 #endif
 235
 236 /*-----------------------------------------------------------------------
 237  * Physical Memory Map
 238  */
 239 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 240 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 241 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 242 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 243
 244 /* SDRAM Bank Allocation method */
 245 #define SDRC_R_B_C              1
 246
 247 /*-----------------------------------------------------------------------
 248  * FLASH and environment organization
 249  */
 250
 251 /* **** PISMO SUPPORT *** */
 252
 253 /* Configure the PISMO */
 254 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 255 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 256
 257 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 258
 259 #if defined(CONFIG_CMD_NAND)
 260 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 261 #endif
 262
 263 /* Monitor at start of flash */
 264 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 265
 266 #define CONFIG_ENV_IS_IN_NAND           1
 267 #define SMNAND_ENV_OFFSET               0x0c0000 /* environment starts here */
 268
 269 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 270 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 271 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 272
 273 #endif /* __CONFIG_H */