include/configs/omap3_zoom2.h

   1 /*
   2  * (C) Copyright 2006-2009
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Syed Mohammed Khasim <x0khasim@ti.com>
   6  * Nishanth Menon <nm@ti.com>
   7  * Tom Rix <Tom.Rix@windriver.com>
   8  *
   9  * Configuration settings for the TI OMAP3430 Zoom II board.
  10  *
  11  * SPDX-License-Identifier:     GPL-2.0+
  12  */
  13
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 /*
  18  * High Level Configuration Options
  19  */
  20 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  21 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  22 #define CONFIG_OMAP3_ZOOM2      1       /* working with Zoom II */
  23 #define CONFIG_OMAP_GPIO
  24 #define CONFIG_OMAP_COMMON
  25
  26 #define CONFIG_SDRC     /* The chip has SDRC controller */
  27
  28 #include <asm/arch/cpu.h>       /* get chip and board defs */
  29 #include <asm/arch/omap3.h>
  30
  31 /*
  32  * Display CPU and Board information
  33  */
  34 #define CONFIG_DISPLAY_CPUINFO          1
  35 #define CONFIG_DISPLAY_BOARDINFO        1
  36
  37 /* Clock Defines */
  38 #define V_OSCK                  26000000        /* Clock output from T2 */
  39 #define V_SCLK                  (V_OSCK >> 1)
  40
  41 #define CONFIG_MISC_INIT_R
  42
  43 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  44 #define CONFIG_SETUP_MEMORY_TAGS        1
  45 #define CONFIG_INITRD_TAG               1
  46 #define CONFIG_REVISION_TAG             1
  47
  48 #define CONFIG_OF_LIBFDT                1
  49
  50 /*
  51  * Size of malloc() pool
  52  */
  53 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  54                                                 /* Sector */
  55 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  56 /*
  57  * Hardware drivers
  58  */
  59
  60 /*
  61  * NS16550 Configuration
  62  * Zoom2 uses the TL16CP754C on the debug board
  63  */
  64 /*
  65  * 0 - 1 : first  USB with respect to the left edge of the debug board
  66  * 2 - 3 : second USB with respect to the left edge of the debug board
  67  */
  68 #define ZOOM2_DEFAULT_SERIAL_DEVICE     0
  69
  70 #define V_NS16550_CLK                   (1843200)       /* 1.8432 Mhz */
  71
  72 #define CONFIG_SYS_NS16550
  73 #define CONFIG_SYS_NS16550_REG_SIZE     (-2)
  74 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  75 #define CONFIG_BAUDRATE                 115200
  76 #define CONFIG_SYS_BAUDRATE_TABLE       {115200}
  77
  78 /* allow to overwrite serial and ethaddr */
  79 #define CONFIG_ENV_OVERWRITE
  80
  81 #define CONFIG_GENERIC_MMC              1
  82 #define CONFIG_MMC                      1
  83 #define CONFIG_OMAP_HSMMC               1
  84 #define CONFIG_DOS_PARTITION            1
  85
  86 /* Status LED */
  87 #define CONFIG_STATUS_LED               1 /* Status LED enabled */
  88 #define CONFIG_BOARD_SPECIFIC_LED       1
  89 #define STATUS_LED_BLUE                 0
  90 #define STATUS_LED_RED                  1
  91 /* Blue */
  92 #define STATUS_LED_BIT                  STATUS_LED_BLUE
  93 #define STATUS_LED_STATE                STATUS_LED_ON
  94 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
  95 /* Red */
  96 #define STATUS_LED_BIT1                 STATUS_LED_RED
  97 #define STATUS_LED_STATE1               STATUS_LED_OFF
  98 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
  99 /* Optional value */
 100 #define STATUS_LED_BOOT                 STATUS_LED_BIT
 101
 102 /* GPIO banks */
 103 #ifdef CONFIG_STATUS_LED
 104 #define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */
 105 #define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */
 106 #endif
 107 #define CONFIG_OMAP3_GPIO_3 /* board revision */
 108 #define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */
 109
 110 /* USB */
 111 #define CONFIG_MUSB_UDC                 1
 112 #define CONFIG_USB_OMAP3                1
 113 #define CONFIG_TWL4030_USB              1
 114
 115 /* USB device configuration */
 116 #define CONFIG_USB_DEVICE               1
 117 #define CONFIG_USB_TTY                  1
 118 /* Change these to suit your needs */
 119 #define CONFIG_USBD_VENDORID            0x0451
 120 #define CONFIG_USBD_PRODUCTID           0x5678
 121 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 122 #define CONFIG_USBD_PRODUCT_NAME        "Zoom2"
 123
 124 /* commands to include */
 125 #include <config_cmd_default.h>
 126
 127 #define CONFIG_CMD_FAT                  /* FAT support                  */
 128 #define CONFIG_CMD_I2C                  /* I2C serial bus support       */
 129 #define CONFIG_CMD_MMC                  /* MMC support                  */
 130 #define CONFIG_CMD_NAND                 /* NAND support                 */
 131 #define CONFIG_CMD_NAND_LOCK_UNLOCK     /* Enable lock/unlock support   */
 132
 133 #undef CONFIG_CMD_FLASH                 /* flinfo, erase, protect       */
 134 #undef CONFIG_CMD_FPGA                  /* FPGA configuration Support   */
 135 #undef CONFIG_CMD_IMI                   /* iminfo                       */
 136 #undef CONFIG_CMD_IMLS                  /* List all found images        */
 137 #undef CONFIG_CMD_NET                   /* bootp, tftpboot, rarpboot    */
 138 #undef CONFIG_CMD_NFS                   /* NFS support                  */
 139
 140 #define CONFIG_SYS_NO_FLASH
 141 #define CONFIG_SYS_I2C
 142 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 143 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 144 #define CONFIG_SYS_I2C_OMAP34XX
 145
 146 /*
 147  * TWL4030
 148  */
 149 #define CONFIG_TWL4030_POWER            1
 150 #define CONFIG_TWL4030_LED              1
 151
 152 /*
 153  * Board NAND Info.
 154  */
 155 #define CONFIG_NAND_OMAP_GPMC
 156 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 157                                                         /* to access nand */
 158 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 159                                                         /* to access nand at */
 160                                                         /* CS0 */
 161 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 162 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 163
 164 /* Environment information */
 165 #define CONFIG_BOOTDELAY                10
 166
 167 #define CONFIG_EXTRA_ENV_SETTINGS \
 168         "usbtty=cdc_acm\0" \
 169
 170 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 171 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 172 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 173 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 174                                          CONFIG_SYS_INIT_RAM_SIZE - \
 175                                          GENERATED_GBL_DATA_SIZE)
 176 /*
 177  * Miscellaneous configurable options
 178  */
 179
 180 #define CONFIG_SYS_PROMPT               "OMAP3 Zoom2 # "
 181 #define CONFIG_SYS_LONGHELP
 182 #define CONFIG_SYS_CBSIZE               512
 183 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 184                                          sizeof(CONFIG_SYS_PROMPT) + 16)
 185 #define CONFIG_SYS_MAXARGS              16
 186 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 187 /* Memtest from start of memory to 31MB */
 188 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 189 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + 0x01F00000)
 190 /* The default load address is the start of memory */
 191 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
 192 /* everything, incl board info, in Hz */
 193 #undef CONFIG_SYS_CLKS_IN_HZ
 194 /*
 195  * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
 196  * 32KHz clk, or from external sig. This rate is divided by a local divisor.
 197  */
 198 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 199 #define CONFIG_SYS_PTV                  7       /* 2^(PTV+1) */
 200 #define CONFIG_SYS_HZ                   ((V_SCLK) / (2 << CONFIG_SYS_PTV))
 201
 202 /*-----------------------------------------------------------------------
 203  * Physical Memory Map
 204  */
 205 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 206 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 207 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 208
 209 /*-----------------------------------------------------------------------
 210  * FLASH and environment organization
 211  */
 212
 213 /* **** PISMO SUPPORT *** */
 214
 215 /* Configure the PISMO */
 216 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 217 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 218
 219 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 220
 221 #if defined(CONFIG_CMD_NAND)
 222 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 223 #endif
 224
 225 /* Monitor at start of flash */
 226 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 227
 228 #define CONFIG_ENV_IS_IN_NAND           1
 229 #define SMNAND_ENV_OFFSET               0x0c0000 /* environment starts here */
 230
 231 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 232 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 233 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 234
 235 #define CONFIG_SYS_CACHELINE_SIZE       64
 236
 237 #endif /* __CONFIG_H */