include/configs/omap5912osk.h

   1 /*
   2  * (C) Copyright 2003
   3  * Texas Instruments.
   4  * Kshitij Gupta <kshitij@ti.com>
   5  * Configuation settings for the TI OMAP Innovator board.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #ifndef __CONFIG_H
  27 #define __CONFIG_H
  28
  29 /*
  30  * High Level Configuration Options
  31  * (easy to change)
  32  */
  33 #define CONFIG_ARM926EJS        1       /* This is an arm926ejs CPU core  */
  34 #define CONFIG_OMAP     1                       /* in a TI OMAP core    */
  35 #define CONFIG_OMAP1610 1               /* 5912 is same as 1610  */
  36 #define CONFIG_OSK_OMAP5912     1       /*  a OSK Board  */
  37
  38 #define CONFIG_DISPLAY_CPUINFO  1       /* display cpu info (and speed) */
  39 #define CONFIG_DISPLAY_BOARDINFO 1      /* display board info           */
  40
  41 /* input clock of PLL */
  42 /* the OMAP5912 OSK has 12MHz input clock */
  43 #define CONFIG_SYS_CLK_FREQ     12000000
  44
  45 #undef CONFIG_USE_IRQ   /* we don't need IRQ/FIQ stuff */
  46
  47 #define CONFIG_CMDLINE_TAG      1       /* enable passing of ATAGs  */
  48 #define CONFIG_SETUP_MEMORY_TAGS        1
  49 #define CONFIG_INITRD_TAG      1       /* Required for ramdisk support */
  50
  51 /*
  52  * Size of malloc() pool
  53  */
  54 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 128*1024)
  55
  56 /*
  57  * Hardware drivers
  58  */
  59 /*
  60 */
  61 #define CONFIG_LAN91C96
  62 #define CONFIG_LAN91C96_BASE 0x04800300
  63 #define CONFIG_LAN91C96_EXT_PHY
  64
  65 /*
  66  * NS16550 Configuration
  67  */
  68 #define CONFIG_SYS_NS16550
  69 #define CONFIG_SYS_NS16550_SERIAL
  70 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  71 #define CONFIG_SYS_NS16550_CLK  (48000000)      /* can be 12M/32Khz or 48Mhz */
  72 #define CONFIG_SYS_NS16550_COM1 0xfffb0000      /* uart1, bluetooth uart
  73                                                 on helen */
  74
  75 /*
  76  * select serial console configuration
  77  */
  78 #define CONFIG_SERIAL1  1       /* we use SERIAL 1 on OMAP5912 OSK */
  79
  80 /* allow to overwrite serial and ethaddr */
  81 #define CONFIG_ENV_OVERWRITE
  82 #define CONFIG_CONS_INDEX       1
  83 #define CONFIG_BAUDRATE 115200
  84
  85 /*
  86  * Command line configuration.
  87  */
  88 #include <config_cmd_default.h>
  89
  90 #define CONFIG_CMD_DHCP
  91
  92
  93 /*
  94  * BOOTP options
  95  */
  96 #define CONFIG_BOOTP_SUBNETMASK
  97 #define CONFIG_BOOTP_GATEWAY
  98 #define CONFIG_BOOTP_HOSTNAME
  99 #define CONFIG_BOOTP_BOOTPATH
 100
 101
 102 #include <configs/omap1510.h>
 103
 104 #define CONFIG_BOOTDELAY        3
 105 #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
 106                                 root=/dev/nfs rw nfsroot=157.87.82.48:\
 107                                 /home/mwd/myfs/target ip=dhcp"
 108 #define CONFIG_NETMASK  255.255.254.0   /* talk on MY local net */
 109 #define CONFIG_IPADDR   156.117.97.156  /* static IP I currently own */
 110 #define CONFIG_SERVERIP 156.117.97.139  /* current IP of my dev pc */
 111 #define CONFIG_BOOTFILE "uImage"        /* file to load */
 112
 113 #if defined(CONFIG_CMD_KGDB)
 114 #define CONFIG_KGDB_BAUDRATE    115200  /* speed to run kgdb serial port */
 115 #define CONFIG_KGDB_SER_INDEX   1       /* which serial port to use */
 116 #endif
 117
 118 /*
 119  * Miscellaneous configurable options
 120  */
 121 #define CONFIG_SYS_LONGHELP     /* undef to save memory     */
 122 #define CONFIG_SYS_PROMPT       "OMAP5912 OSK # "       /* Monitor Command Prompt   */
 123 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size  */
 124 /* Print Buffer Size */
 125 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 126 #define CONFIG_SYS_MAXARGS      16              /* max number of command args   */
 127 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 128
 129 #define CONFIG_SYS_MEMTEST_START        0x10000000      /* memtest works on */
 130 #define CONFIG_SYS_MEMTEST_END  0x12000000      /* 32 MB in DRAM    */
 131
 132 #define CONFIG_SYS_LOAD_ADDR    0x10000000      /* default load address */
 133
 134 /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
 135  * DPLL1. This time is further subdivided by a local divisor.
 136  */
 137 #define CONFIG_SYS_TIMERBASE    0xFFFEC500      /* use timer 1 */
 138 #define CONFIG_SYS_PTV          7       /* 2^(PTV+1), divide by 256 */
 139 #define CONFIG_SYS_HZ           ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 140
 141 /*-----------------------------------------------------------------------
 142  * Stack sizes
 143  *
 144  * The stack sizes are set up in start.S using the settings below
 145  */
 146 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 147 #ifdef CONFIG_USE_IRQ
 148 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 149 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 150 #endif
 151
 152 /*-----------------------------------------------------------------------
 153  * Physical Memory Map
 154  */
 155 #define CONFIG_NR_DRAM_BANKS    1       /* we have 1 bank of DRAM */
 156 #define PHYS_SDRAM_1            0x10000000      /* SDRAM Bank #1 */
 157 #define PHYS_SDRAM_1_SIZE       0x02000000      /* 32 MB */
 158
 159 #define PHYS_FLASH_1            0x00000000      /* Flash Bank #1 */
 160 #define PHYS_FLASH_2            0x01000000      /* Flash Bank #2 */
 161
 162 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 163
 164 #define CONFIG_SYS_MONITOR_BASE       CONFIG_SYS_FLASH_BASE  /* Monitor at beginning of flash */
 165
 166 #define PHYS_SRAM               0x20000000
 167
 168 /*-----------------------------------------------------------------------
 169  * FLASH driver setup
 170  */
 171 #define CONFIG_SYS_FLASH_CFI          1       /* Flash memory is CFI compliant */
 172 #define CONFIG_FLASH_CFI_DRIVER   1       /* Use drivers/mtd/cfi_flash.c */
 173
 174 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
 175
 176 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of memory banks */
 177 #define PHYS_FLASH_SIZE 0x02000000      /* 32MB */
 178 #define CONFIG_SYS_MAX_FLASH_SECT       (259)   /* max number of sectors on one chip */
 179
 180 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE     1       /* Use buffered writes (~10x faster) */
 181 #define CONFIG_SYS_FLASH_PROTECTION   1       /* Use hardware sector protection */
 182
 183 #define CONFIG_SYS_FLASH_EMPTY_INFO             /* print 'E' for empty sector on flinfo */
 184
 185 /* timeout values are in ticks */
 186 #define CONFIG_SYS_FLASH_ERASE_TOUT     (20*CONFIG_SYS_HZ)      /* Timeout for Flash Erase */
 187 #define CONFIG_SYS_FLASH_WRITE_TOUT     (20*CONFIG_SYS_HZ)      /* Timeout for Flash Write */
 188
 189 /*-----------------------------------------------------------------------
 190  * FLASH and environment organization
 191  */
 192 #define CONFIG_ENV_IS_IN_FLASH  1
 193 /* addr of environment */
 194 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
 195
 196 #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
 197 #define CONFIG_ENV_OFFSET       0x20000 /* environment starts here  */
 198
 199 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_1
 200 #define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
 201
 202 #endif                                                  /* __CONFIG_H */