include/configs/palmtc.h

   1 /*
   2  * Palm Tungsten|C configuration file
   3  *
   4  * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #ifndef __CONFIG_H
  23 #define __CONFIG_H
  24
  25 #include <asm/arch/pxa-regs.h>
  26
  27 /*
  28  * High Level Board Configuration Options
  29  */
  30 #define CONFIG_PXA250                   1       /* Intel PXA255 CPU */
  31 #define CONFIG_PALMTC                   1       /* Palm Tungsten|C board */
  32
  33 /*
  34  * Environment settings
  35  */
  36 #define CONFIG_ENV_OVERWRITE
  37 #define CONFIG_SYS_MALLOC_LEN           (128*1024)
  38 #define CONFIG_SYS_TEXT_BASE    0x0
  39
  40 #define CONFIG_BOOTCOMMAND                                              \
  41         "if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then "  \
  42                 "source 0xa0000000; "                                   \
  43         "else "                                                         \
  44                 "bootm 0x80000; "                                       \
  45         "fi; "
  46 #define CONFIG_BOOTARGS                                                 \
  47         "console=tty0 console=ttyS0,115200"
  48 #define CONFIG_TIMESTAMP
  49 #define CONFIG_BOOTDELAY                2       /* Autoboot delay */
  50 #define CONFIG_CMDLINE_TAG
  51 #define CONFIG_SETUP_MEMORY_TAGS
  52
  53 #define CONFIG_LZMA                     /* LZMA compression support */
  54
  55 /*
  56  * Serial Console Configuration
  57  * STUART - the lower serial port on Colibri board
  58  */
  59 #define CONFIG_PXA_SERIAL
  60 #define CONFIG_FFUART                   1
  61 #define CONFIG_BAUDRATE                 115200
  62 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  63
  64 /*
  65  * Bootloader Components Configuration
  66  */
  67 #include <config_cmd_default.h>
  68
  69 #undef  CONFIG_CMD_NET
  70 #undef  CONFIG_CMD_NFS
  71 #define CONFIG_CMD_ENV
  72 #define CONFIG_CMD_MMC
  73 #define CONFIG_LCD
  74
  75 /*
  76  * MMC Card Configuration
  77  */
  78 #ifdef  CONFIG_CMD_MMC
  79 #define CONFIG_MMC
  80 #define CONFIG_PXA_MMC
  81 #define CONFIG_SYS_MMC_BASE             0xF0000000
  82 #define CONFIG_CMD_FAT
  83 #define CONFIG_CMD_EXT2
  84 #define CONFIG_DOS_PARTITION
  85 #endif
  86
  87 /*
  88  * LCD
  89  */
  90 #ifdef  CONFIG_LCD
  91 #define CONFIG_ACX517AKN
  92 #define CONFIG_VIDEO_LOGO
  93 #define CONFIG_CMD_BMP
  94 #define CONFIG_SPLASH_SCREEN
  95 #define CONFIG_SPLASH_SCREEN_ALIGN
  96 #define CONFIG_VIDEO_BMP_GZIP
  97 #define CONFIG_VIDEO_BMP_RLE8
  98 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (2 << 20)
  99 #endif
 100
 101 /*
 102  * KGDB
 103  */
 104 #ifdef  CONFIG_CMD_KGDB
 105 #define CONFIG_KGDB_BAUDRATE            230400  /* kgdb serial port speed */
 106 #define CONFIG_KGDB_SER_INDEX           2       /* which serial port to use */
 107 #endif
 108
 109 /*
 110  * HUSH Shell Configuration
 111  */
 112 #define CONFIG_SYS_HUSH_PARSER          1
 113 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 114
 115 #define CONFIG_SYS_LONGHELP
 116 #ifdef  CONFIG_SYS_HUSH_PARSER
 117 #define CONFIG_SYS_PROMPT               "$ "
 118 #else
 119 #define CONFIG_SYS_PROMPT               "=> "
 120 #endif
 121 #define CONFIG_SYS_CBSIZE               256
 122 #define CONFIG_SYS_PBSIZE               \
 123         (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 124 #define CONFIG_SYS_MAXARGS              16
 125 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 126 #define CONFIG_SYS_DEVICE_NULLDEV       1
 127
 128 /*
 129  * Clock Configuration
 130  */
 131 #undef  CONFIG_SYS_CLKS_IN_HZ
 132 #define CONFIG_SYS_HZ                   3686400         /* Timer @ 3686400 Hz */
 133 #define CONFIG_SYS_CPUSPEED             0x161           /* 400MHz;L=1 M=3 T=1 */
 134
 135 /*
 136  * Stack sizes
 137  */
 138 #define CONFIG_STACKSIZE                (128*1024)      /* regular stack */
 139 #ifdef  CONFIG_USE_IRQ
 140 #define CONFIG_STACKSIZE_IRQ            (4*1024)        /* IRQ stack */
 141 #define CONFIG_STACKSIZE_FIQ            (4*1024)        /* FIQ stack */
 142 #endif
 143
 144 /*
 145  * DRAM Map
 146  */
 147 #define CONFIG_NR_DRAM_BANKS            1               /* 1 bank of DRAM */
 148 #define PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
 149 #define PHYS_SDRAM_1_SIZE               0x04000000      /* 64 MB */
 150
 151 #define CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
 152 #define CONFIG_SYS_DRAM_SIZE            0x04000000      /* 64 MB DRAM */
 153
 154 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on */
 155 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM */
 156
 157 #define CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_DRAM_BASE
 158
 159 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 160 #define CONFIG_SYS_INIT_SP_ADDR         (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
 161
 162 /*
 163  * NOR FLASH
 164  */
 165 #ifdef  CONFIG_CMD_FLASH
 166 #define PHYS_FLASH_1                    0x00000000      /* Flash Bank #1 */
 167 #define PHYS_FLASH_SIZE                 0x01000000      /* 16 MB */
 168 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 169
 170 #define CONFIG_SYS_FLASH_CFI
 171 #define CONFIG_FLASH_CFI_DRIVER         1
 172 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_32BIT
 173
 174 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 175 #define CONFIG_SYS_MAX_FLASH_SECT       64
 176
 177 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 178
 179 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2*CONFIG_SYS_HZ)
 180 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2*CONFIG_SYS_HZ)
 181 #define CONFIG_SYS_FLASH_LOCK_TOUT      (2*CONFIG_SYS_HZ)
 182 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    (2*CONFIG_SYS_HZ)
 183 #define CONFIG_SYS_FLASH_PROTECTION
 184
 185 #define CONFIG_ENV_IS_IN_FLASH          1
 186 #define CONFIG_ENV_SECT_SIZE            0x40000
 187 #else
 188 #define CONFIG_SYS_NO_FLASH
 189 #define CONFIG_ENV_IS_NOWHERE
 190 #endif
 191
 192 #define CONFIG_SYS_MONITOR_BASE         0x0
 193 #define CONFIG_SYS_MONITOR_LEN          0x40000
 194
 195 #define CONFIG_ENV_SIZE                 0x4000
 196 #define CONFIG_ENV_ADDR                 0x40000
 197
 198 /*
 199  * GPIO settings
 200  */
 201 #define CONFIG_SYS_GAFR0_L_VAL  0x00011004
 202 #define CONFIG_SYS_GAFR0_U_VAL  0xa5000008
 203 #define CONFIG_SYS_GAFR1_L_VAL  0x60888050
 204 #define CONFIG_SYS_GAFR1_U_VAL  0xaaa50aaa
 205 #define CONFIG_SYS_GAFR2_L_VAL  0x0aaaaaaa
 206 #define CONFIG_SYS_GAFR2_U_VAL  0x00000000
 207 #define CONFIG_SYS_GPCR0_VAL    0x0
 208 #define CONFIG_SYS_GPCR1_VAL    0x0
 209 #define CONFIG_SYS_GPCR2_VAL    0x0
 210 #define CONFIG_SYS_GPDR0_VAL    0xcfff8140
 211 #define CONFIG_SYS_GPDR1_VAL    0xfcbfbef3
 212 #define CONFIG_SYS_GPDR2_VAL    0x0001ffff
 213 #define CONFIG_SYS_GPSR0_VAL    0x00010f8f
 214 #define CONFIG_SYS_GPSR1_VAL    0x00bf5de5
 215 #define CONFIG_SYS_GPSR2_VAL    0x03fe0800
 216
 217 #define CONFIG_SYS_PSSR_VAL     PSSR_RDH
 218
 219 /* Clock setup:
 220  * CKEN[1] - PWM1 ; CKEN[6] - FFUART
 221  * CKEN[12] - MMC ; CKEN[16] - LCD
 222  */
 223 #define CONFIG_SYS_CKEN         0x00011042
 224 #define CONFIG_SYS_CCCR         0x00000161
 225
 226 /*
 227  * Memory settings
 228  */
 229 #define CONFIG_SYS_MSC0_VAL     0x800092c2
 230 #define CONFIG_SYS_MSC1_VAL     0x80008000
 231 #define CONFIG_SYS_MSC2_VAL     0x80008000
 232 #define CONFIG_SYS_MDCNFG_VAL   0x00001ac9
 233 #define CONFIG_SYS_MDREFR_VAL   0x00118018
 234 #define CONFIG_SYS_MDMRS_VAL    0x00220032
 235 #define CONFIG_SYS_FLYCNFG_VAL  0x01fe01fe
 236 #define CONFIG_SYS_SXCNFG_VAL   0x00000000
 237
 238 /*
 239  * PCMCIA and CF Interfaces
 240  */
 241 #define CONFIG_SYS_MECR_VAL     0x00000000
 242 #define CONFIG_SYS_MCMEM0_VAL   0x00010504
 243 #define CONFIG_SYS_MCMEM1_VAL   0x00010504
 244 #define CONFIG_SYS_MCATT0_VAL   0x00010504
 245 #define CONFIG_SYS_MCATT1_VAL   0x00010504
 246 #define CONFIG_SYS_MCIO0_VAL    0x00010e04
 247 #define CONFIG_SYS_MCIO1_VAL    0x00010e04
 248
 249 #endif  /* __CONFIG_H */