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1 /*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the phytec PCM-052 SoM.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include <asm/arch/imx-regs.h>
13
14 #define CONFIG_VF610
15
16 #define CONFIG_SYS_THUMB_BUILD
17
18 #define CONFIG_SKIP_LOWLEVEL_INIT
19
20 /* Enable passing of ATAGs */
21 #define CONFIG_CMDLINE_TAG
22
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25
26 #define CONFIG_BOARD_EARLY_INIT_F
27
28 /* Allow to overwrite serial and ethaddr */
29 #define CONFIG_ENV_OVERWRITE
30 #define CONFIG_BAUDRATE 115200
31
32 /* NAND support */
33 #define CONFIG_CMD_NAND
34 #define CONFIG_CMD_NAND_TRIMFFS
35 #define CONFIG_SYS_NAND_ONFI_DETECTION
36
37 #ifdef CONFIG_CMD_NAND
38 #define CONFIG_SYS_MAX_NAND_DEVICE 1
39 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
40
41 #define CONFIG_JFFS2_NAND
42
43 /* UBI */
44 #define CONFIG_CMD_UBIFS
45 #define CONFIG_RBTREE
46 #define CONFIG_LZO
47
48 /* Dynamic MTD partition support */
49 #define CONFIG_CMD_MTDPARTS
50 #define CONFIG_MTD_PARTITIONS
51 #define CONFIG_MTD_DEVICE
52
53 #ifndef MTDIDS_DEFAULT
54 #define MTDIDS_DEFAULT "nand0=NAND"
55 #endif
56
57 #ifndef MTDPARTS_DEFAULT
58 #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\
59 ",128k(env1)"\
60 ",128k(env2)"\
61 ",128k(dtb)"\
62 ",6144k(kernel)"\
63 ",-(root)"
64 #endif
65
66 #endif
67
68 #define CONFIG_FSL_ESDHC
69 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
70 #define CONFIG_SYS_FSL_ESDHC_NUM 1
71
72 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
73 #define CONFIG_SYS_FSL_ERRATUM_ESDHC135
74 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
75 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
76
77 #define CONFIG_GENERIC_MMC
78 #define CONFIG_DOS_PARTITION
79
80 #define CONFIG_FEC_MXC
81 #define CONFIG_MII
82 #define IMX_FEC_BASE ENET_BASE_ADDR
83 #define CONFIG_FEC_XCV_TYPE RMII
84 #define CONFIG_FEC_MXC_PHYADDR 0
85 #define CONFIG_PHYLIB
86 #define CONFIG_PHY_MICREL
87
88 /* QSPI Configs*/
89
90 #ifdef CONFIG_FSL_QSPI
91 #define FSL_QSPI_FLASH_SIZE (1 << 24)
92 #define FSL_QSPI_FLASH_NUM 2
93 #define CONFIG_SYS_FSL_QSPI_LE
94 #endif
95
96 /* I2C Configs */
97 #define CONFIG_SYS_I2C
98 #define CONFIG_SYS_I2C_MXC_I2C3
99 #define CONFIG_SYS_I2C_MXC
100
101 /* RTC (actually an RV-4162 but M41T62-compatible) */
102 #define CONFIG_CMD_DATE
103 #define CONFIG_RTC_M41T62
104 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
105 #define CONFIG_SYS_RTC_BUS_NUM 2
106
107 /* EEPROM (24FC256) */
108 #define CONFIG_CMD_EEPROM
109 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
110 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
111 #define CONFIG_SYS_I2C_EEPROM_BUS 2
112
113
114 #define CONFIG_LOADADDR 0x82000000
115
116 /* We boot from the gfxRAM area of the OCRAM. */
117 #define CONFIG_SYS_TEXT_BASE 0x3f408000
118 #define CONFIG_BOARD_SIZE_LIMIT 524288
119
120 /* if no target-specific extra environment settings were defined by the
121 target, define an empty one */
122 #ifndef PCM052_EXTRA_ENV_SETTINGS
123 #define PCM052_EXTRA_ENV_SETTINGS
124 #endif
125
126 /* if no target-specific boot command was defined by the target,
127 define an empty one */
128 #ifndef PCM052_BOOTCOMMAND
129 #define PCM052_BOOTCOMMAND
130 #endif
131
132 /* if no target-specific extra environment settings were defined by the
133 target, define an empty one */
134 #ifndef PCM052_NET_INIT
135 #define PCM052_NET_INIT
136 #endif
137
138 /* boot command, including the target-defined one if any */
139 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
140
141 /* Extra env settings (including the target-defined ones if any) */
142 #define CONFIG_EXTRA_ENV_SETTINGS \
143 PCM052_EXTRA_ENV_SETTINGS \
144 "autoload=no\0" \
145 "fdt_high=0xffffffff\0" \
146 "initrd_high=0xffffffff\0" \
147 "blimg_file=u-boot.vyb\0" \
148 "blimg_addr=0x81000000\0" \
149 "kernel_file=zImage\0" \
150 "kernel_addr=0x82000000\0" \
151 "fdt_file=zImage.dtb\0" \
152 "fdt_addr=0x81000000\0" \
153 "ram_file=uRamdisk\0" \
154 "ram_addr=0x83000000\0" \
155 "filesys=rootfs.ubifs\0" \
156 "sys_addr=0x81000000\0" \
157 "tftploc=/path/to/tftp/directory/\0" \
158 "nfs_root=/path/to/nfs/root\0" \
159 "tftptimeout=1000\0" \
160 "tftptimeoutcountmax=1000000\0" \
161 "mtdparts=" MTDPARTS_DEFAULT "\0" \
162 "bootargs_base=setenv bootargs rw " \
163 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
164 "console=ttyLP1,115200n8\0" \
165 "bootargs_sd=setenv bootargs ${bootargs} " \
166 "root=/dev/mmcblk0p2 rootwait\0" \
167 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
168 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
169 "bootargs_nand=setenv bootargs ${bootargs} " \
170 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
171 "bootargs_ram=setenv bootargs ${bootargs} " \
172 "root=/dev/ram rw initrd=${ram_addr}\0" \
173 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
174 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
175 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
176 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
177 "bootz ${kernel_addr} - ${fdt_addr}\0" \
178 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
179 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
180 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
181 "bootz ${kernel_addr} - ${fdt_addr}\0" \
182 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
183 "nand read ${fdt_addr} dtb; " \
184 "nand read ${kernel_addr} kernel; " \
185 "bootz ${kernel_addr} - ${fdt_addr}\0" \
186 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
187 "nand read ${fdt_addr} dtb; " \
188 "nand read ${kernel_addr} kernel; " \
189 "nand read ${ram_addr} root; " \
190 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
191 "update_bootloader_from_tftp=" PCM052_NET_INIT \
192 "if tftp ${blimg_addr} "\
193 "${tftpdir}${blimg_file}; then " \
194 "mtdparts default; " \
195 "nand erase.part bootloader; " \
196 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
197 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
198 "${kernel_file}; " \
199 "then mtdparts default; " \
200 "nand erase.part kernel; " \
201 "nand write ${kernel_addr} kernel ${filesize}; " \
202 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
203 "nand erase.part dtb; " \
204 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
205 "update_kernel_from_tftp=" PCM052_NET_INIT \
206 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
207 "then setenv fdtsize ${filesize}; " \
208 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
209 "mtdparts default; " \
210 "nand erase.part dtb; " \
211 "nand write ${fdt_addr} dtb ${fdtsize}; " \
212 "nand erase.part kernel; " \
213 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
214 "update_rootfs_from_tftp=" PCM052_NET_INIT \
215 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
216 "then mtdparts default; " \
217 "nand erase.part root; " \
218 "ubi part root; " \
219 "ubi create rootfs; " \
220 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
221 "update_ramdisk_from_tftp=" PCM052_NET_INIT \
222 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
223 "then mtdparts default; " \
224 "nand erase.part root; " \
225 "nand write ${ram_addr} root ${filesize}; fi\0"
226
227 /* Miscellaneous configurable options */
228 #define CONFIG_SYS_LONGHELP /* undef to save memory */
229 #define CONFIG_AUTO_COMPLETE
230 #define CONFIG_CMDLINE_EDITING
231 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
232 #define CONFIG_SYS_PBSIZE \
233 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
234 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
235 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
236
237 #define CONFIG_SYS_MEMTEST_START 0x80010000
238 #define CONFIG_SYS_MEMTEST_END 0x87C00000
239
240 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
241
242 /*
243 * Stack sizes
244 * The stack sizes are set up in start.S using the settings below
245 */
246 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
247
248 /* Physical memory map */
249 #define CONFIG_NR_DRAM_BANKS 1
250 #define PHYS_SDRAM (0x80000000)
251 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
252
253 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
254 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
255 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
256
257 #define CONFIG_SYS_INIT_SP_OFFSET \
258 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
259 #define CONFIG_SYS_INIT_SP_ADDR \
260 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
261
262 /* FLASH and environment organization */
263 #define CONFIG_SYS_NO_FLASH
264
265 #ifdef CONFIG_ENV_IS_IN_MMC
266 #define CONFIG_ENV_SIZE (8 * 1024)
267
268 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
269 #define CONFIG_SYS_MMC_ENV_DEV 0
270 #endif
271
272 #ifdef CONFIG_ENV_IS_IN_NAND
273 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
274 #define CONFIG_ENV_SIZE (8 * 1024)
275 #define CONFIG_ENV_OFFSET 0xA0000
276 #define CONFIG_ENV_SIZE_REDUND (8 * 1024)
277 #define CONFIG_ENV_OFFSET_REDUND 0xC0000
278 #endif
279
280 #endif