include/configs/pm9g45.h

   1 /*
   2  * (C) Copyright 2010
   3  * Ilko Iliev <iliev@ronetix.at>
   4  * Asen Dimov <dimov@ronetix.at>
   5  * Ronetix GmbH <www.ronetix.at>
   6  *
   7  * (C) Copyright 2007-2008
   8  * Stelian Pop <stelian.pop@leadtechdesign.com>
   9  * Lead Tech Design <www.leadtechdesign.com>
  10  *
  11  * Configuation settings for the PM9G45 board.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31
  32 #ifndef __CONFIG_H
  33 #define __CONFIG_H
  34
  35 #define CONFIG_ARM926EJS        1       /* This is an ARM926EJS Core */
  36 #define CONFIG_PM9G45           1       /* It's an Ronetix PM9G45 */
  37 #define CONFIG_AT91SAM9G45      1       /* It's an Atmel AT91SAM9G45 SoC */
  38
  39 /* ARM asynchronous clock */
  40 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
  41 #define CONFIG_SYS_HZ                   1000
  42 #define CONFIG_SYS_TEXT_BASE    0x73f00000
  43 #define CONFIG_AT91FAMILY
  44
  45 #define CONFIG_ARCH_CPU_INIT
  46
  47 #define CONFIG_CMDLINE_TAG      1       /* enable passing of ATAGs */
  48 #define CONFIG_SETUP_MEMORY_TAGS 1
  49 #define CONFIG_INITRD_TAG       1
  50
  51 #define CONFIG_SKIP_LOWLEVEL_INIT
  52
  53 /*
  54  * Hardware drivers
  55  */
  56 #define CONFIG_AT91_GPIO        1
  57 #define CONFIG_ATMEL_USART      1
  58 #define CONFIG_USART3           1       /* USART 3 is DBGU */
  59
  60 #define CONFIG_SYS_USE_NANDFLASH        1
  61
  62 /* LED */
  63 #define CONFIG_AT91_LED
  64 #define CONFIG_RED_LED          AT91_PIO_PORTD, 31 /* this is the user1 led */
  65 #define CONFIG_GREEN_LED        AT91_PIO_PORTD, 0 /* this is the user2 led */
  66
  67 #define CONFIG_BOOTDELAY        3
  68
  69 /*
  70  * BOOTP options
  71  */
  72 #define CONFIG_BOOTP_BOOTFILESIZE       1
  73 #define CONFIG_BOOTP_BOOTPATH           1
  74 #define CONFIG_BOOTP_GATEWAY            1
  75 #define CONFIG_BOOTP_HOSTNAME           1
  76
  77 /*
  78  * Command line configuration.
  79  */
  80 #include <config_cmd_default.h>
  81 #undef CONFIG_CMD_FPGA
  82 #undef CONFIG_CMD_IMLS
  83
  84 #define CONFIG_CMD_CACHE
  85 #define CONFIG_CMD_PING         1
  86 #define CONFIG_CMD_DHCP         1
  87 #define CONFIG_CMD_NAND         1
  88 #define CONFIG_CMD_USB          1
  89
  90 #define CONFIG_CMD_JFFS2                1
  91 #define CONFIG_JFFS2_CMDLINE            1
  92 #define CONFIG_JFFS2_NAND               1
  93 #define CONFIG_JFFS2_DEV                "nand0" /* NAND dev jffs2 lives on */
  94 #define CONFIG_JFFS2_PART_OFFSET        0       /* start of jffs2 partition */
  95 #define CONFIG_JFFS2_PART_SIZE          (256 * 1024 * 1024) /* partition */
  96
  97 /* SDRAM */
  98 #define CONFIG_NR_DRAM_BANKS            1
  99 #define PHYS_SDRAM                      0x70000000
 100 #define PHYS_SDRAM_SIZE                 0x08000000      /* 128 megs */
 101
 102 /* NOR flash, not available */
 103 #define CONFIG_SYS_NO_FLASH             1
 104 #undef CONFIG_CMD_FLASH
 105
 106 /* NAND flash */
 107 #ifdef CONFIG_CMD_NAND
 108 #define CONFIG_NAND_MAX_CHIPS           1
 109 #define CONFIG_NAND_ATMEL
 110 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 111 #define CONFIG_SYS_NAND_BASE            0x40000000
 112 #define CONFIG_SYS_NAND_DBW_8           1
 113 /* our ALE is AD21 */
 114 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
 115 /* our CLE is AD22 */
 116 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
 117 #define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIO_PORTC, 14
 118 #define CONFIG_SYS_NAND_READY_PIN       AT91_PIO_PORTD, 3
 119
 120 #endif
 121
 122 /* Ethernet */
 123 #define CONFIG_MACB                     1
 124 #define CONFIG_RMII                     1
 125 #define CONFIG_NET_MULTI                1
 126 #define CONFIG_NET_RETRY_COUNT          20
 127 #define CONFIG_RESET_PHY_R              1
 128
 129 /* USB */
 130 #define CONFIG_USB_ATMEL
 131 #define CONFIG_USB_OHCI_NEW             1
 132 #define CONFIG_DOS_PARTITION            1
 133 #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
 134 #define CONFIG_SYS_USB_OHCI_REGS_BASE   0x00700000 /* _UHP_OHCI_BASE */
 135 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "at91sam9g45"
 136 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
 137 #define CONFIG_USB_STORAGE              1
 138
 139 /* board specific(not enough SRAM) */
 140 #define CONFIG_AT91SAM9G45_LCD_BASE     PHYS_SDRAM + 0xE00000
 141
 142 #define CONFIG_SYS_LOAD_ADDR            PHYS_SDRAM + 0x2000000 /* load addr */
 143
 144 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM
 145 #define CONFIG_SYS_MEMTEST_END          CONFIG_AT91SAM9G45_LCD_BASE
 146
 147 /* bootstrap + u-boot + env + linux in nandflash */
 148 #define CONFIG_ENV_IS_IN_NAND           1
 149 #define CONFIG_ENV_OFFSET               0x60000
 150 #define CONFIG_ENV_OFFSET_REDUND        0x80000
 151 #define CONFIG_ENV_SIZE                 0x20000         /* 1 sector = 128 kB */
 152 #define CONFIG_BOOTCOMMAND      "nand read 0x72000000 0x200000 0x200000; bootm"
 153 #define CONFIG_BOOTARGS         "fbcon=rotate:3 console=tty0 " \
 154                                 "console=ttyS0,115200 " \
 155                                 "root=/dev/mtdblock4 " \
 156                                 "mtdparts=atmel_nand:128k(bootstrap)ro," \
 157                                 "256k(uboot)ro,1664k(env)," \
 158                                 "2M(linux)ro,-(root) rw " \
 159                                 "rootfstype=jffs2"
 160
 161 #define CONFIG_BAUDRATE                 115200
 162 #define CONFIG_SYS_BAUDRATE_TABLE       {115200 , 19200, 38400, 57600, 9600 }
 163
 164 #define CONFIG_SYS_PROMPT               "U-Boot> "
 165 #define CONFIG_SYS_CBSIZE               256
 166 #define CONFIG_SYS_MAXARGS              16
 167 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 168                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 169 #define CONFIG_SYS_LONGHELP             1
 170 #define CONFIG_CMDLINE_EDITING          1
 171 #define CONFIG_AUTO_COMPLETE
 172 #define CONFIG_SYS_HUSH_PARSER
 173 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 174
 175 /*
 176  * Size of malloc() pool
 177  */
 178 #define CONFIG_SYS_MALLOC_LEN           ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\
 179                                         0x1000)
 180
 181 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM
 182 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
 183                                 GENERATED_GBL_DATA_SIZE)
 184
 185 #define CONFIG_STACKSIZE                (32*1024)       /* regular stack */
 186
 187 #ifdef CONFIG_USE_IRQ
 188 #error CONFIG_USE_IRQ not supported
 189 #endif
 190
 191 #endif