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1 /*
2 * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
3 *
4 * Configuration settings for the Dave/DENX QongEVB-LITE board.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22 #ifndef __CONFIG_H
23 #define __CONFIG_H
24
25 #include <asm/arch/mx31-regs.h>
26
27 /* High Level Configuration Options */
28 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
29 #define CONFIG_MX31 1 /* in a mx31 */
30 #define CONFIG_QONG 1
31 #define CONFIG_MX31_HCLK_FREQ 26000000 /* 26MHz */
32 #define CONFIG_MX31_CLK32 32768
33
34 #define CONFIG_DISPLAY_CPUINFO
35 #define CONFIG_DISPLAY_BOARDINFO
36
37 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
38 #define CONFIG_SETUP_MEMORY_TAGS 1
39 #define CONFIG_INITRD_TAG 1
40
41 /*
42 * Size of malloc() pool
43 */
44 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
45 /* size in bytes reserved for initial data */
46 #define CONFIG_SYS_GBL_DATA_SIZE 128
47
48 /*
49 * Hardware drivers
50 */
51
52 #define CONFIG_MXC_UART 1
53 #define CONFIG_SYS_MX31_UART1 1
54
55 #define CONFIG_MX31_GPIO
56
57 #define CONFIG_MXC_SPI
58 #define CONFIG_DEFAULT_SPI_BUS 1
59 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
60 #define CONFIG_RTC_MC13783
61
62 #define CONFIG_FSL_PMIC
63 #define CONFIG_FSL_PMIC_BUS 1
64 #define CONFIG_FSL_PMIC_CS 0
65 #define CONFIG_FSL_PMIC_CLK 100000
66 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH)
67
68 /* FPGA */
69 #define CONFIG_QONG_FPGA 1
70 #define CONFIG_FPGA_BASE (CS1_BASE)
71
72 #ifdef CONFIG_QONG_FPGA
73 /* Ethernet */
74 #define CONFIG_DNET 1
75 #define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
76 #define CONFIG_NET_MULTI 1
77
78 /* Framebuffer and LCD */
79 #define CONFIG_LCD
80 #define CONFIG_VIDEO_MX3
81 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
82 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
83 #define LCD_BPP LCD_COLOR16
84 #define CONFIG_SPLASH_SCREEN
85 #define CONFIG_CMD_BMP
86 #define CONFIG_BMP_16BPP
87 #define CONFIG_DISPLAY_COM57H5M10XRC
88
89 /*
90 * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
91 * initial TFTP transfer, should the user wish one, significantly.
92 */
93 #define CONFIG_ARP_TIMEOUT 200UL
94
95 #endif /* CONFIG_QONG_FPGA */
96
97 #define CONFIG_CONS_INDEX 1
98 #define CONFIG_BAUDRATE 115200
99 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
100
101 /***********************************************************
102 * Command definition
103 ***********************************************************/
104
105 #include <config_cmd_default.h>
106
107 #define CONFIG_CMD_PING
108 #define CONFIG_CMD_DHCP
109 #define CONFIG_CMD_NET
110 #define CONFIG_CMD_MII
111 #define CONFIG_CMD_NAND
112 #define CONFIG_CMD_SPI
113 #define CONFIG_CMD_DATE
114 #define BOARD_LATE_INIT
115
116 /*
117 * You can compile in a MAC address and your custom net settings by using
118 * the following syntax.
119 *
120 * #define CONFIG_ETHADDR xx:xx:xx:xx:xx:xx
121 * #define CONFIG_SERVERIP <server ip>
122 * #define CONFIG_IPADDR <board ip>
123 * #define CONFIG_GATEWAYIP <gateway ip>
124 * #define CONFIG_NETMASK <your netmask>
125 */
126
127 #define CONFIG_BOOTDELAY 5
128
129 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
130
131 #define xstr(s) str(s)
132 #define str(s) #s
133
134 #define CONFIG_EXTRA_ENV_SETTINGS \
135 "netdev=eth0\0" \
136 "nfsargs=setenv bootargs root=/dev/nfs rw " \
137 "nfsroot=${serverip}:${rootpath}\0" \
138 "ramargs=setenv bootargs root=/dev/ram rw\0" \
139 "addip=setenv bootargs ${bootargs} " \
140 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
141 ":${hostname}:${netdev}:off panic=1\0" \
142 "addtty=setenv bootargs ${bootargs}" \
143 " console=ttymxc0,${baudrate}\0" \
144 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
145 "addmisc=setenv bootargs ${bootargs}\0" \
146 "uboot_addr=A0000000\0" \
147 "kernel_addr=A00A0000\0" \
148 "ramdisk_addr=A0300000\0" \
149 "u-boot=qong/u-boot.bin\0" \
150 "kernel_addr_r=80800000\0" \
151 "hostname=qong\0" \
152 "bootfile=qong/uImage\0" \
153 "rootpath=/opt/eldk-4.2-arm/armVFP\0" \
154 "flash_self=run ramargs addip addtty addmtd addmisc;" \
155 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
156 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
157 "bootm ${kernel_addr}\0" \
158 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
159 "run nfsargs addip addtty addmtd addmisc;" \
160 "bootm\0" \
161 "bootcmd=run flash_self\0" \
162 "load=tftp ${loadaddr} ${u-boot}\0" \
163 "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
164 " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
165 " +${filesize};cp.b ${fileaddr} " \
166 xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
167 "upd=run load update\0" \
168
169 /*
170 * Miscellaneous configurable options
171 */
172 #define CONFIG_SYS_LONGHELP /* undef to save memory */
173 #define CONFIG_SYS_PROMPT "=> "
174 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
175 /* Print Buffer Size */
176 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
177 sizeof(CONFIG_SYS_PROMPT) + 16)
178 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
179 /* Boot Argument Buffer Size */
180 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
181
182 /* memtest works on first 255MB of RAM */
183 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
184 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0xff000000)
185
186 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
187
188 #define CONFIG_SYS_HZ 1000
189
190 #define CONFIG_CMDLINE_EDITING 1
191 #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
192 #ifdef CONFIG_SYS_HUSH_PARSER
193 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
194 #endif
195
196 #define CONFIG_MISC_INIT_R 1
197 /*-----------------------------------------------------------------------
198 * Stack sizes
199 *
200 * The stack sizes are set up in start.S using the settings below
201 */
202 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
203
204 /*-----------------------------------------------------------------------
205 * Physical Memory Map
206 */
207 #define CONFIG_NR_DRAM_BANKS 1
208 #define PHYS_SDRAM_1 CSD0_BASE
209 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
210
211 /*
212 * NAND driver
213 */
214
215 #ifndef __ASSEMBLY__
216 extern void qong_nand_plat_init(void *chip);
217 extern int qong_nand_rdy(void *chip);
218 #endif
219 #define CONFIG_NAND_PLAT
220 #define CONFIG_SYS_MAX_NAND_DEVICE 1
221 #define CONFIG_SYS_NAND_BASE CS3_BASE
222 #define NAND_PLAT_INIT() qong_nand_plat_init(nand)
223
224 #define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
225 #define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
226 #define QONG_NAND_WRITE(addr, cmd) \
227 do { \
228 __REG8(addr) = cmd; \
229 } while (0)
230
231 #define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
232 #define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
233 #define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip))
234
235 /*-----------------------------------------------------------------------
236 * FLASH and environment organization
237 */
238 #define CONFIG_SYS_FLASH_BASE CS0_BASE
239 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
240 /* max number of sectors on one chip */
241 #define CONFIG_SYS_MAX_FLASH_SECT 1024
242 /* Monitor at beginning of flash */
243 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
244 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
245
246 #define CONFIG_ENV_IS_IN_FLASH 1
247 #define CONFIG_ENV_SECT_SIZE 0x20000
248 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
249 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000)
250
251 /* Address and size of Redundant Environment Sector */
252 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
253 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
254
255 /*-----------------------------------------------------------------------
256 * CFI FLASH driver setup
257 */
258 /* Flash memory is CFI compliant */
259 #define CONFIG_SYS_FLASH_CFI 1
260 /* Use drivers/cfi_flash.c */
261 #define CONFIG_FLASH_CFI_DRIVER 1
262 /* Use buffered writes (~10x faster) */
263 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
264 /* Use hardware sector protection */
265 #define CONFIG_SYS_FLASH_PROTECTION 1
266
267 /*
268 * Filesystem
269 */
270 #define CONFIG_CMD_JFFS2
271 #define CONFIG_CMD_UBI
272 #define CONFIG_CMD_UBIFS
273 #define CONFIG_RBTREE
274 #define CONFIG_MTD_PARTITIONS
275 #define CONFIG_CMD_MTDPARTS
276 #define CONFIG_LZO
277 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
278 #define CONFIG_FLASH_CFI_MTD
279 #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
280 #define MTDPARTS_DEFAULT \
281 "mtdparts=physmap-flash.0:384k(U-Boot),128k(env1)," \
282 "128k(env2),2432k(kernel),13m(ramdisk),-(user)"
283
284 #endif /* __CONFIG_H */