include/configs/rk3288_common.h

   1 /*
   2  * (C) Copyright 2015 Google, Inc
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __CONFIG_RK3288_COMMON_H
   8 #define __CONFIG_RK3288_COMMON_H
   9
  10 #include <asm/arch/hardware.h>
  11
  12 #define CONFIG_SYS_NO_FLASH
  13 #define CONFIG_NR_DRAM_BANKS            1
  14 #define CONFIG_ENV_SIZE                 0x2000
  15 #define CONFIG_SYS_MAXARGS              16
  16 #define CONFIG_BAUDRATE                 115200
  17 #define CONFIG_SYS_MALLOC_LEN           (32 << 20)
  18 #define CONFIG_SYS_CBSIZE               1024
  19 #define CONFIG_SKIP_LOWLEVEL_INIT
  20 #define CONFIG_SYS_THUMB_BUILD
  21 #define CONFIG_OF_LIBFDT
  22 #define CONFIG_DISPLAY_BOARDINFO
  23
  24 #define CONFIG_SYS_TIMER_RATE           (24 * 1000 * 1000)
  25 #define CONFIG_SYS_TIMER_BASE           0xff810020 /* TIMER7 */
  26 #define CONFIG_SYS_TIMER_COUNTER        (CONFIG_SYS_TIMER_BASE + 8)
  27
  28 #define CONFIG_SPL_FRAMEWORK
  29 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
  30 #define CONFIG_SPL_LIBCOMMON_SUPPORT
  31 #define CONFIG_SPL_LIBGENERIC_SUPPORT
  32 #define CONFIG_SPL_SERIAL_SUPPORT
  33 #define CONFIG_SYS_NS16550_MEM32
  34 #define CONFIG_SPL_BOARD_INIT
  35
  36 #define CONFIG_SYS_TEXT_BASE            0x00100000
  37 #define CONFIG_SYS_INIT_SP_ADDR         0x00100000
  38 #define CONFIG_SYS_LOAD_ADDR            0x00800800
  39 #define CONFIG_SPL_STACK                0xff718000
  40 #define CONFIG_SPL_TEXT_BASE            0xff704004
  41
  42 #define CONFIG_ROCKCHIP_COMMON
  43 #define CONFIG_SPL_ROCKCHIP_COMMON
  44
  45 #define CONFIG_SILENT_CONSOLE
  46 #ifndef CONFIG_SPL_BUILD
  47 # define CONFIG_SYS_CONSOLE_IS_IN_ENV
  48 # define CONFIG_CONSOLE_MUX
  49 #endif
  50
  51 /* MMC/SD IP block */
  52 #define CONFIG_MMC
  53 #define CONFIG_GENERIC_MMC
  54 #define CONFIG_CMD_MMC
  55 #define CONFIG_SDHCI
  56 #define CONFIG_DWMMC
  57 #define CONFIG_BOUNCE_BUFFER
  58
  59 #define CONFIG_DOS_PARTITION
  60 #define CONFIG_CMD_FAT
  61 #define CONFIG_FAT_WRITE
  62 #define CONFIG_CMD_EXT2
  63 #define CONFIG_CMD_EXT4
  64 #define CONFIG_CMD_FS_GENERIC
  65 #define CONFIG_PARTITION_UUIDS
  66 #define CONFIG_CMD_PART
  67
  68 /* RAW SD card / eMMC locations. */
  69 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
  70 #define CONFIG_SYS_SPI_U_BOOT_OFFS      (128 << 10)
  71
  72 /* FAT sd card locations. */
  73 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  74 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
  75
  76 #define CONFIG_SPL_PINCTRL_SUPPORT
  77 #define CONFIG_SPL_GPIO_SUPPORT
  78 #define CONFIG_SPL_RAM_SUPPORT
  79 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
  80
  81 #define CONFIG_CMD_CACHE
  82 #define CONFIG_CMD_TIME
  83
  84 #define CONFIG_SYS_SDRAM_BASE           0
  85 #define CONFIG_NR_DRAM_BANKS            1
  86 #define SDRAM_BANK_SIZE                 (2UL << 30)
  87
  88 #define CONFIG_SPI_FLASH
  89 #define CONFIG_SPI
  90 #define CONFIG_CMD_SF
  91 #define CONFIG_CMD_SPI
  92 #define CONFIG_SF_DEFAULT_SPEED 20000000
  93
  94 #define CONFIG_CMD_I2C
  95
  96 #ifndef CONFIG_SPL_BUILD
  97 #include <config_distro_defaults.h>
  98
  99 #define ENV_MEM_LAYOUT_SETTINGS \
 100         "scriptaddr=0x00000000\0" \
 101         "pxefile_addr_r=0x00100000\0" \
 102         "fdt_addr_r=0x01f00000\0" \
 103         "kernel_addr_r=0x02000000\0" \
 104         "ramdisk_addr_r=0x04000000\0"
 105
 106 /* First try to boot from SD (index 0), then eMMC (index 1 */
 107 #define BOOT_TARGET_DEVICES(func) \
 108         func(MMC, mmc, 0) \
 109         func(MMC, mmc, 1)
 110
 111 #include <config_distro_bootcmd.h>
 112
 113 /* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so
 114  * limit the fdt reallocation to that */
 115 #define CONFIG_EXTRA_ENV_SETTINGS \
 116         "fdt_high=0x1fffffff\0" \
 117         "initrd_high=0x1fffffff\0" \
 118         ENV_MEM_LAYOUT_SETTINGS \
 119         ROCKCHIP_DEVICE_SETTINGS \
 120         BOOTENV
 121 #endif
 122
 123 #endif