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Fix Compliation warning for SBC35-A9G20 board
[people/ms/u-boot.git] / include / configs / sbc35_a9g20.h
1 /*
2 * Copyright (C) 2009
3 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
4 *
5 * Configuation settings for the Calao SBC35-A9G20 board
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #ifndef __CONFIG_H
27 #define __CONFIG_H
28
29 #if defined(CONFIG_SBC35_A9G20_NANDFLASH) || defined(CONFIG_SBC35_A9G20_EEPROM)
30 #define CONFIG_SBC35_A9G20
31 #endif
32
33 #define CONFIG_AT91SAM9G20
34
35 #if defined(CONFIG_SBC35_A9G20_NANDFLASH)
36 #define CONFIG_ENV_IS_IN_NAND
37 #else
38 #define CONFIG_ENV_IS_IN_EEPROM
39 #endif
40
41 /* ARM asynchronous clock */
42 #define AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
43 #define CONFIG_SYS_HZ 1000
44
45 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
46
47 #define CONFIG_ARCH_CPU_INIT
48 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
49
50 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
51 #define CONFIG_SETUP_MEMORY_TAGS 1
52 #define CONFIG_INITRD_TAG 1
53
54 #define CONFIG_SKIP_LOWLEVEL_INIT
55 #define CONFIG_SKIP_RELOCATE_UBOOT
56
57 /*
58 * Hardware drivers
59 */
60 #define CONFIG_ATMEL_USART
61 #define CONFIG_USART0
62 #undef CONFIG_USART1
63 #undef CONFIG_USART2
64 #undef CONFIG_USART3
65
66 #define CONFIG_BOOTDELAY 3
67
68 /*
69 * BOOTP options
70 */
71 #define CONFIG_BOOTP_BOOTFILESIZE 1
72 #define CONFIG_BOOTP_BOOTPATH 1
73 #define CONFIG_BOOTP_GATEWAY 1
74 #define CONFIG_BOOTP_HOSTNAME 1
75
76 /*
77 * Command line configuration.
78 */
79 #include <config_cmd_default.h>
80 #undef CONFIG_CMD_BDI
81 #undef CONFIG_CMD_FPGA
82 #undef CONFIG_CMD_IMI
83 #undef CONFIG_CMD_IMLS
84 #undef CONFIG_CMD_LOADS
85 #undef CONFIG_CMD_SOURCE
86
87 #define CONFIG_CMD_PING 1
88 #define CONFIG_CMD_DHCP 1
89 #define CONFIG_CMD_USB 1
90
91 /* SDRAM */
92 #define CONFIG_NR_DRAM_BANKS 1
93 #define PHYS_SDRAM 0x20000000
94 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
95
96 /* SPI EEPROM */
97 #define CONFIG_SPI
98 #define CONFIG_CMD_SPI
99 #define CONFIG_ATMEL_SPI
100 #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
101
102 #define CONFIG_CMD_EEPROM
103 #define CONFIG_SPI_M95XXX
104 #define CONFIG_SYS_EEPROM_SIZE 0x10000
105 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
106
107 /* SPI RTC */
108 #define CONFIG_CMD_DATE
109 #define CONFIG_RTC_M41T94
110 #define CONFIG_M41T94_SPI_BUS 0
111 #define CONFIG_M41T94_SPI_CS 0
112
113 /* NAND flash */
114 #define CONFIG_CMD_NAND
115 #define CONFIG_NAND_ATMEL
116 #define CONFIG_SYS_MAX_NAND_DEVICE 1
117 #define CONFIG_SYS_NAND_BASE 0x40000000
118 #define CONFIG_SYS_NAND_DBW_8 1
119 /* our ALE is AD21 */
120 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
121 /* our CLE is AD22 */
122 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
123 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
124 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
125
126 /* NOR flash - no real flash on this board */
127 #define CONFIG_SYS_NO_FLASH 1
128
129 /* Ethernet */
130 #define CONFIG_MACB 1
131 #define CONFIG_RMII 1
132 #define CONFIG_NET_MULTI 1
133 #define CONFIG_NET_RETRY_COUNT 20
134 #define CONFIG_RESET_PHY_R 1
135 #define CONFIG_MACB_SEARCH_PHY 1
136
137 /* USB */
138 #define CONFIG_USB_ATMEL
139 #define CONFIG_USB_OHCI_NEW 1
140 #define CONFIG_DOS_PARTITION 1
141 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
142 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
143 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
144 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
145 #define CONFIG_USB_STORAGE 1
146 #define CONFIG_CMD_FAT 1
147
148 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
149
150 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
151 #define CONFIG_SYS_MEMTEST_END 0x23e00000
152
153 /* Env in EEPROM, bootstrap + u-boot in NAND*/
154 #ifdef CONFIG_ENV_IS_IN_EEPROM
155 #define CONFIG_ENV_OFFSET 0x20
156 #define CONFIG_ENV_SIZE 0x1000
157 #endif
158
159 /* Env, bootstrap and u-boot in NAND */
160 #ifdef CONFIG_ENV_IS_IN_NAND
161 #define CONFIG_ENV_OFFSET 0x60000
162 #define CONFIG_ENV_OFFSET_REDUND 0x80000
163 #define CONFIG_ENV_SIZE 0x20000
164 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
165 #endif
166
167 #define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
168 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
169 "root=/dev/mtdblock1 " \
170 "mtdparts=atmel_nand:16M(kernel)ro," \
171 "120M(rootfs),-(other) " \
172 "rw rootfstype=jffs2"
173
174 #define CONFIG_BAUDRATE 115200
175 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
176
177 #define CONFIG_SYS_PROMPT "U-Boot> "
178 #define CONFIG_SYS_CBSIZE 256
179 #define CONFIG_SYS_MAXARGS 16
180 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
181 #define CONFIG_SYS_LONGHELP 1
182 #define CONFIG_CMDLINE_EDITING 1
183
184 /*
185 * Size of malloc() pool
186 */
187 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
188 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
189 #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
190
191 #ifdef CONFIG_USE_IRQ
192 #error CONFIG_USE_IRQ not supported
193 #endif
194
195 #endif