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add new CONFIG_AT91_LEGACY
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1 /*
2 * Copyright (C) 2009
3 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
4 *
5 * Configuation settings for the Calao SBC35-A9G20 board
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #ifndef __CONFIG_H
27 #define __CONFIG_H
28
29 #define CONFIG_AT91_LEGACY
30
31 #if defined(CONFIG_SBC35_A9G20_NANDFLASH) || defined(CONFIG_SBC35_A9G20_EEPROM)
32 #define CONFIG_SBC35_A9G20
33 #endif
34
35 #define CONFIG_AT91SAM9G20
36
37 #if defined(CONFIG_SBC35_A9G20_NANDFLASH)
38 #define CONFIG_ENV_IS_IN_NAND
39 #else
40 #define CONFIG_ENV_IS_IN_EEPROM
41 #endif
42
43 /* ARM asynchronous clock */
44 #define AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
45 #define CONFIG_SYS_HZ 1000
46
47 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
48
49 #define CONFIG_ARCH_CPU_INIT
50 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
51
52 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
53 #define CONFIG_SETUP_MEMORY_TAGS 1
54 #define CONFIG_INITRD_TAG 1
55
56 #define CONFIG_SKIP_LOWLEVEL_INIT
57 #define CONFIG_SKIP_RELOCATE_UBOOT
58
59 /*
60 * Hardware drivers
61 */
62 #define CONFIG_ATMEL_USART
63 #define CONFIG_USART0
64 #undef CONFIG_USART1
65 #undef CONFIG_USART2
66 #undef CONFIG_USART3
67
68 #define CONFIG_BOOTDELAY 3
69
70 /*
71 * BOOTP options
72 */
73 #define CONFIG_BOOTP_BOOTFILESIZE 1
74 #define CONFIG_BOOTP_BOOTPATH 1
75 #define CONFIG_BOOTP_GATEWAY 1
76 #define CONFIG_BOOTP_HOSTNAME 1
77
78 /*
79 * Command line configuration.
80 */
81 #include <config_cmd_default.h>
82 #undef CONFIG_CMD_BDI
83 #undef CONFIG_CMD_FPGA
84 #undef CONFIG_CMD_IMI
85 #undef CONFIG_CMD_IMLS
86 #undef CONFIG_CMD_LOADS
87 #undef CONFIG_CMD_SOURCE
88
89 #define CONFIG_CMD_PING 1
90 #define CONFIG_CMD_DHCP 1
91 #define CONFIG_CMD_USB 1
92
93 /* SDRAM */
94 #define CONFIG_NR_DRAM_BANKS 1
95 #define PHYS_SDRAM 0x20000000
96 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
97
98 /* SPI EEPROM */
99 #define CONFIG_SPI
100 #define CONFIG_CMD_SPI
101 #define CONFIG_ATMEL_SPI
102 #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
103
104 #define CONFIG_CMD_EEPROM
105 #define CONFIG_SPI_M95XXX
106 #define CONFIG_SYS_EEPROM_SIZE 0x10000
107 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
108
109 /* SPI RTC */
110 #define CONFIG_CMD_DATE
111 #define CONFIG_RTC_M41T94
112 #define CONFIG_M41T94_SPI_BUS 0
113 #define CONFIG_M41T94_SPI_CS 0
114
115 /* NAND flash */
116 #define CONFIG_CMD_NAND
117 #define CONFIG_NAND_ATMEL
118 #define CONFIG_SYS_MAX_NAND_DEVICE 1
119 #define CONFIG_SYS_NAND_BASE 0x40000000
120 #define CONFIG_SYS_NAND_DBW_8 1
121 /* our ALE is AD21 */
122 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
123 /* our CLE is AD22 */
124 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
125 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
126 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
127
128 /* NOR flash - no real flash on this board */
129 #define CONFIG_SYS_NO_FLASH 1
130
131 /* Ethernet */
132 #define CONFIG_MACB 1
133 #define CONFIG_RMII 1
134 #define CONFIG_NET_MULTI 1
135 #define CONFIG_NET_RETRY_COUNT 20
136 #define CONFIG_RESET_PHY_R 1
137 #define CONFIG_MACB_SEARCH_PHY 1
138
139 /* USB */
140 #define CONFIG_USB_ATMEL
141 #define CONFIG_USB_OHCI_NEW 1
142 #define CONFIG_DOS_PARTITION 1
143 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
144 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
145 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
146 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
147 #define CONFIG_USB_STORAGE 1
148 #define CONFIG_CMD_FAT 1
149
150 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
151
152 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
153 #define CONFIG_SYS_MEMTEST_END 0x23e00000
154
155 /* Env in EEPROM, bootstrap + u-boot in NAND*/
156 #ifdef CONFIG_ENV_IS_IN_EEPROM
157 #define CONFIG_ENV_OFFSET 0x20
158 #define CONFIG_ENV_SIZE 0x1000
159 #endif
160
161 /* Env, bootstrap and u-boot in NAND */
162 #ifdef CONFIG_ENV_IS_IN_NAND
163 #define CONFIG_ENV_OFFSET 0x60000
164 #define CONFIG_ENV_OFFSET_REDUND 0x80000
165 #define CONFIG_ENV_SIZE 0x20000
166 #endif
167
168 #define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
169 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
170 "root=/dev/mtdblock1 " \
171 "mtdparts=atmel_nand:16M(kernel)ro," \
172 "120M(rootfs),-(other) " \
173 "rw rootfstype=jffs2"
174
175 #define CONFIG_BAUDRATE 115200
176 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
177
178 #define CONFIG_SYS_PROMPT "U-Boot> "
179 #define CONFIG_SYS_CBSIZE 256
180 #define CONFIG_SYS_MAXARGS 16
181 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
182 #define CONFIG_SYS_LONGHELP 1
183 #define CONFIG_CMDLINE_EDITING 1
184
185 /*
186 * Size of malloc() pool
187 */
188 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
189 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
190 #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
191
192 #ifdef CONFIG_USE_IRQ
193 #error CONFIG_USE_IRQ not supported
194 #endif
195
196 #endif