include/configs/shannon.h

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Alex Zuepke <azu@sysgo.de>
   5  *
   6  * Configuation settings for the Shannon/TuxScreen/IS2630 WebPhone Board.
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*
  31  * Since we use the Inferno-Loader to bring us to live,
  32  * we skip the lowlevel init stuff.
  33  * But U-Boot still relocates itself into RAM
  34  */
  35 #define CONFIG_INFERNO                  /* we are using the inferno bootldr */
  36 #define CONFIG_SKIP_LOWLEVEL_INIT       1
  37 #undef  CONFIG_SKIP_RELOCATE_UBOOT
  38
  39 /*
  40  * High Level Configuration Options
  41  * (easy to change)
  42  */
  43 #define CONFIG_SA1100           1       /* This is an SA1100 CPU        */
  44 #define CONFIG_SHANNON          1       /* on an SHANNON/TuxScreen Board      */
  45
  46 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  47 /* we will never enable dcache, because we have to setup MMU first */
  48 #define CONFIG_SYS_NO_DCACHE
  49
  50 /*
  51  * Size of malloc() pool
  52  */
  53 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128*1024)
  54 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
  55
  56 /*
  57  * Hardware drivers
  58  */
  59 #define CONFIG_DRIVER_3C589     1
  60
  61 /*
  62  * select serial console configuration
  63  */
  64 #define CONFIG_SA1100_SERIAL
  65 #define CONFIG_SERIAL3          1       /* we use SERIAL 3  */
  66
  67 /* allow to overwrite serial and ethaddr */
  68 #define CONFIG_ENV_OVERWRITE
  69
  70 #define CONFIG_BAUDRATE         115200
  71
  72
  73 /*
  74  * BOOTP options
  75  */
  76 #define CONFIG_BOOTP_BOOTFILESIZE
  77 #define CONFIG_BOOTP_BOOTPATH
  78 #define CONFIG_BOOTP_GATEWAY
  79 #define CONFIG_BOOTP_HOSTNAME
  80
  81
  82 /*
  83  * Command line configuration.
  84  */
  85 #include <config_cmd_default.h>
  86
  87
  88 #define CONFIG_BOOTDELAY        3
  89 #define CONFIG_BOOTARGS         "root=ramfs devfs=mount console=ttySA0,115200"
  90 #define CONFIG_NETMASK          255.255.0.0
  91 #define CONFIG_BOOTCOMMAND      "help"
  92
  93 #if defined(CONFIG_CMD_KGDB)
  94 #define CONFIG_KGDB_BAUDRATE    230400          /* speed to run kgdb serial port */
  95 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
  96 #endif
  97
  98 /*
  99  * Miscellaneous configurable options
 100  */
 101 #define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
 102 #define CONFIG_SYS_PROMPT               "TuxScreen # "  /* Monitor Command Prompt       */
 103 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
 104 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 105 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 106 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 107
 108 #define CONFIG_SYS_MEMTEST_START        0xc0400000      /* memtest works on     */
 109 #define CONFIG_SYS_MEMTEST_END          0xc0800000      /* 4 ... 8 MB in DRAM   */
 110
 111 #define CONFIG_SYS_LOAD_ADDR            0xd0000000      /* default load address */
 112
 113 #define CONFIG_SYS_HZ                   3686400         /* incrementer freq: 3.6864 MHz */
 114 #define CONFIG_SYS_CPUSPEED             0x09            /* 190 MHz for Shannon */
 115
 116                                                 /* valid baudrates */
 117 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 118
 119 #define CONFIG_DOS_PARTITION    1               /* DOS partitiion support */
 120
 121 /*-----------------------------------------------------------------------
 122  * Stack sizes
 123  *
 124  * The stack sizes are set up in start.S using the settings below
 125  */
 126 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 127 #ifdef CONFIG_USE_IRQ
 128 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 129 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 130 #endif
 131
 132 /*-----------------------------------------------------------------------
 133  * Physical Memory Map
 134  */
 135 /* BE CAREFUL */
 136 #define CONFIG_NR_DRAM_BANKS    4          /* we have 4 banks of EDORAM */
 137 #define PHYS_SDRAM_1            0xc0000000 /* RAM Bank #1 */
 138 #define PHYS_SDRAM_1_SIZE       0x00400000 /* 4 MB */
 139 #define PHYS_SDRAM_2            0xc8000000 /* RAM Bank #2 */
 140 #define PHYS_SDRAM_2_SIZE       0x00400000 /* 4 MB */
 141 #define PHYS_SDRAM_3            0xd0000000 /* RAM Bank #3 */
 142 #define PHYS_SDRAM_3_SIZE       0x00400000 /* 4 MB */
 143 #define PHYS_SDRAM_4            0xd8000000 /* RAM Bank #4 */
 144 #define PHYS_SDRAM_4_SIZE       0x00400000 /* 4 MB */
 145
 146
 147 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
 148 #define PHYS_FLASH_SIZE         0x00400000 /* 4 MB */
 149
 150 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 151
 152 /*-----------------------------------------------------------------------
 153  * FLASH and environment organization
 154  */
 155 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 156 #define CONFIG_SYS_MAX_FLASH_SECT       (31+4)  /* max number of sectors on one chip    */
 157
 158 /* timeout values are in ticks */
 159 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 160 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 161
 162 #define CONFIG_ENV_IS_IN_FLASH  1
 163 #ifdef CONFIG_INFERNO
 164 /* we take the last sector, 128 KB in size, but we only use 4 KB of it for stack reasons */
 165 #define CONFIG_ENV_ADDR         (PHYS_FLASH_1 + 0x003E0000)     /* Addr of Environment Sector   */
 166 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector     */
 167 #else
 168 #define CONFIG_ENV_ADDR         (PHYS_FLASH_1 + 0x1C000)        /* Addr of Environment Sector   */
 169 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector     */
 170 #endif
 171
 172 /*-----------------------------------------------------------------------
 173  * PCMCIA stuff
 174  *-----------------------------------------------------------------------
 175  *
 176  */
 177
 178 /* we pick the upper one */
 179
 180 #define CONFIG_PCMCIA_SLOT_A
 181
 182 #define CONFIG_SYS_PCMCIA_IO_ADDR       (0x20000000)
 183 #define CONFIG_SYS_PCMCIA_IO_SIZE       ( 64 << 20 )
 184 #define CONFIG_SYS_PCMCIA_DMA_ADDR      (0x24000000)
 185 #define CONFIG_SYS_PCMCIA_DMA_SIZE      ( 64 << 20 )
 186 #define CONFIG_SYS_PCMCIA_ATTRB_ADDR    (0x2C000000)
 187 #define CONFIG_SYS_PCMCIA_ATTRB_SIZE    ( 64 << 20 )
 188 #define CONFIG_SYS_PCMCIA_MEM_ADDR      (0x28000000)
 189 #define CONFIG_SYS_PCMCIA_MEM_SIZE      ( 64 << 20 )
 190
 191 /* in fact, MEM and ATTRB are swapped - has to be corrected soon in cmd_pcmcia or so */
 192
 193 /*-----------------------------------------------------------------------
 194  * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
 195  *-----------------------------------------------------------------------
 196  */
 197
 198 #define CONFIG_IDE_PCCARD       1       /* Use IDE with PC Card Adapter */
 199
 200 #undef  CONFIG_IDE_PCMCIA               /* Direct IDE    not supported  */
 201 #undef  CONFIG_IDE_LED                  /* LED   for ide not supported  */
 202 #undef  CONFIG_IDE_RESET                /* reset for ide not supported  */
 203
 204 #define CONFIG_SYS_IDE_MAXBUS           1       /* max. 1 IDE bus               */
 205 #define CONFIG_SYS_IDE_MAXDEVICE        1       /* max. 1 drive per IDE bus     */
 206
 207 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 208
 209 /* it's simple, all regs are in I/O space */
 210 #define CONFIG_SYS_ATA_BASE_ADDR        CONFIG_SYS_PCMCIA_ATTRB_ADDR
 211
 212 /* Offset for data I/O                  */
 213 #define CONFIG_SYS_ATA_DATA_OFFSET      0
 214
 215 /* Offset for normal register accesses  */
 216 #define CONFIG_SYS_ATA_REG_OFFSET       0
 217
 218 /* Offset for alternate registers       */
 219 #define CONFIG_SYS_ATA_ALT_OFFSET       0
 220
 221 /*-----------------------------------------------------------------------
 222  */
 223
 224 #endif  /* __CONFIG_H */