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ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE
[people/ms/u-boot.git] / include / configs / silk.h
1 /*
2 * include/configs/silk.h
3 * This file is silk board configuration.
4 *
5 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Copyright (C) 2015 Cogent Embedded, Inc.
7 *
8 * SPDX-License-Identifier: GPL-2.0
9 */
10
11 #ifndef __SILK_H
12 #define __SILK_H
13
14 #undef DEBUG
15 #define CONFIG_R8A7794
16 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Silk"
17
18 #include "rcar-gen2-common.h"
19
20 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
21 #define CONFIG_SYS_TEXT_BASE 0x70000000
22 #else
23 #define CONFIG_SYS_TEXT_BASE 0xE6304000
24 #endif
25
26 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
27 #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
28 #else
29 #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
30 #endif
31 #define STACK_AREA_SIZE 0xC000
32 #define LOW_LEVEL_MERAM_STACK \
33 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
34
35 /* MEMORY */
36 #define RCAR_GEN2_SDRAM_BASE 0x40000000
37 #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
38 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
39
40 /* SCIF */
41 #define CONFIG_SCIF_CONSOLE
42
43 /* FLASH */
44 #define CONFIG_SPI
45 #define CONFIG_SH_QSPI
46 #define CONFIG_SPI_FLASH_QUAD
47 #define CONFIG_SYS_NO_FLASH
48
49 /* SH Ether */
50 #define CONFIG_SH_ETHER
51 #define CONFIG_SH_ETHER_USE_PORT 0
52 #define CONFIG_SH_ETHER_PHY_ADDR 0x1
53 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
54 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
55 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
56 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
57 #define CONFIG_PHYLIB
58 #define CONFIG_PHY_MICREL
59 #define CONFIG_BITBANGMII
60 #define CONFIG_BITBANGMII_MULTI
61
62 /* Board Clock */
63 #define RMOBILE_XTAL_CLK 20000000u
64 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
65 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
66 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
67 #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24)
68
69 #define CONFIG_SYS_TMU_CLK_DIV 4
70
71 /* i2c */
72 #define CONFIG_SYS_I2C
73 #define CONFIG_SYS_I2C_SH
74 #define CONFIG_SYS_I2C_SLAVE 0x7F
75 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
76 #define CONFIG_SYS_I2C_SH_SPEED0 400000
77 #define CONFIG_SYS_I2C_SH_SPEED1 400000
78 #define CONFIG_SYS_I2C_SH_SPEED2 400000
79 #define CONFIG_SH_I2C_DATA_HIGH 4
80 #define CONFIG_SH_I2C_DATA_LOW 5
81 #define CONFIG_SH_I2C_CLOCK 10000000
82
83 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
84
85 /* USB */
86 #define CONFIG_USB_STORAGE
87 #define CONFIG_USB_EHCI
88 #define CONFIG_USB_EHCI_RMOBILE
89 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
90
91 /* MMCIF */
92 #define CONFIG_MMC
93 #define CONFIG_GENERIC_MMC
94 #define CONFIG_SH_MMCIF
95 #define CONFIG_SH_MMCIF_ADDR 0xee200000
96 #define CONFIG_SH_MMCIF_CLK 48000000
97
98 /* SDHI */
99 #define CONFIG_SH_SDHI_FREQ 97500000
100
101 /* Module stop status bits */
102 /* INTC-RT */
103 #define CONFIG_SMSTP0_ENA 0x00400000
104 /* MSIF */
105 #define CONFIG_SMSTP2_ENA 0x00002000
106 /* INTC-SYS, IRQC */
107 #define CONFIG_SMSTP4_ENA 0x00000180
108 /* SCIF2 */
109 #define CONFIG_SMSTP7_ENA 0x00080000
110
111 #endif /* __SILK_H */