include/configs/smdk2410.h

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  * Gary Jennejohn <gj@denx.de>
   6  * David Mueller <d.mueller@elsoft.ch>
   7  *
   8  * Configuation settings for the SAMSUNG SMDK2410 board.
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #ifndef __CONFIG_H
  30 #define __CONFIG_H
  31
  32 /*
  33  * If we are developing, we might want to start armboot from ram
  34  * so we MUST NOT initialize critical regs like mem-timing ...
  35  */
  36 #define CONFIG_INIT_CRITICAL            /* undef for developing */
  37
  38 /*
  39  * High Level Configuration Options
  40  * (easy to change)
  41  */
  42 #define CONFIG_ARM920T          1       /* This is an ARM920T Core      */
  43 #define CONFIG_S3C2410          1       /* in a SAMSUNG S3C2410 SoC     */
  44 #define CONFIG_SMDK2410         1       /* on a SAMSUNG SMDK2410 Board  */
  45
  46 /* input clock of PLL */
  47 #define CONFIG_PLL_INPUT_FREQ   12000000/* the SMDK2410 has 12MHz input clock */
  48
  49
  50 #define USE_920T_MMU            1
  51 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  52
  53 /*
  54  * Size of malloc() pool
  55  */
  56 #define CONFIG_MALLOC_SIZE      (CFG_ENV_SIZE + 128*1024)
  57
  58 /*
  59  * Hardware drivers
  60  */
  61 #define CONFIG_DRIVER_CS8900    1       /* we have a CS8900 on-board */
  62 #define CS8900_BASE             0x19000300
  63 #define CS8900_BUS16            1 /* the Linux driver does accesses as shorts */
  64
  65 /*
  66  * select serial console configuration
  67  */
  68 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on SMDK2410 */
  69
  70 /* allow to overwrite serial and ethaddr */
  71 #define CONFIG_ENV_OVERWRITE
  72
  73 #define CONFIG_BAUDRATE         115200
  74
  75 #ifndef USE_920T_MMU
  76 #define CONFIG_COMMANDS         (CONFIG_CMD_DFL & ~CFG_CMD_CACHE)
  77 #else
  78 #define CONFIG_COMMANDS         (CONFIG_CMD_DFL)
  79 #endif
  80
  81 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  82 #include <cmd_confdefs.h>
  83
  84 #define CONFIG_BOOTDELAY        3
  85 /*#define CONFIG_BOOTARGS       "root=ramfs devfs=mount console=ttySA0,9600" */
  86 /*#define CONFIG_ETHADDR        08:00:3e:26:0a:5b */
  87 #define CONFIG_NETMASK          255.255.255.0
  88 #define CONFIG_IPADDR           10.0.0.110
  89 #define CONFIG_SERVERIP         10.0.0.1
  90 /*#define CONFIG_BOOTFILE       "elinos-lart" */
  91 /*#define CONFIG_BOOTCOMMAND    "tftp; bootm" */
  92
  93 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  94 #define CONFIG_KGDB_BAUDRATE    115200          /* speed to run kgdb serial port */
  95 /* what's this ? it's not used anywhere */
  96 #define CONFIG_KGDB_SER_INDEX   1               /* which serial port to use */
  97 #endif
  98
  99 /*
 100  * Miscellaneous configurable options
 101  */
 102 #define CFG_LONGHELP                            /* undef to save memory         */
 103 #define CFG_PROMPT              "SMDK2410 # "   /* Monitor Command Prompt       */
 104 #define CFG_CBSIZE              256             /* Console I/O Buffer Size      */
 105 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 106 #define CFG_MAXARGS             16              /* max number of command args   */
 107 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 108
 109 #define CFG_MEMTEST_START       0x30000000      /* memtest works on     */
 110 #define CFG_MEMTEST_END         0x33F00000      /* 63 MB in DRAM        */
 111
 112 #undef  CFG_CLKS_IN_HZ          /* everything, incl board info, in Hz */
 113
 114 #define CFG_LOAD_ADDR           0x33000000      /* default load address */
 115
 116 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
 117 /* it to wrap 100 times (total 1562500) to get 1 sec. */
 118 #define CFG_HZ                  1562500
 119
 120 /* valid baudrates */
 121 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 122
 123 /*-----------------------------------------------------------------------
 124  * Stack sizes
 125  *
 126  * The stack sizes are set up in start.S using the settings below
 127  */
 128 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 129 #ifdef CONFIG_USE_IRQ
 130 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 131 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 132 #endif
 133
 134 /*-----------------------------------------------------------------------
 135  * Physical Memory Map
 136  */
 137 #define CONFIG_NR_DRAM_BANKS    1          /* we have 1 bank of DRAM */
 138 #define PHYS_SDRAM_1            0x30000000 /* SDRAM Bank #1 */
 139 #define PHYS_SDRAM_1_SIZE       0x04000000 /* 64 MB */
 140
 141 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
 142
 143 #define CFG_FLASH_BASE          PHYS_FLASH_1
 144
 145 /*-----------------------------------------------------------------------
 146  * FLASH and environment organization
 147  */
 148
 149 #define CONFIG_AMD_LV400        1       /* uncomment this if you have a LV400 flash */
 150 #if 0
 151 #define CONFIG_AMD_LV800        1       /* uncomment this if you have a LV800 flash */
 152 #endif
 153
 154 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks */
 155 #ifdef CONFIG_AMD_LV800
 156 #define PHYS_FLASH_SIZE         0x00100000 /* 1MB */
 157 #define CFG_MAX_FLASH_SECT      (19)    /* max number of sectors on one chip */
 158 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
 159 #endif
 160 #ifdef CONFIG_AMD_LV400
 161 #define PHYS_FLASH_SIZE         0x00080000 /* 512KB */
 162 #define CFG_MAX_FLASH_SECT      (11)    /* max number of sectors on one chip */
 163 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x070000) /* addr of environment */
 164 #endif
 165
 166 /* timeout values are in ticks */
 167 #define CFG_FLASH_ERASE_TOUT    (5*CFG_HZ) /* Timeout for Flash Erase */
 168 #define CFG_FLASH_WRITE_TOUT    (5*CFG_HZ) /* Timeout for Flash Write */
 169
 170 #define CFG_ENV_IS_IN_FLASH     1
 171 #define CFG_ENV_SIZE            0x10000 /* Total Size of Environment Sector */
 172
 173 #endif  /* __CONFIG_H */