include/configs/smdk2410.h

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  * Gary Jennejohn <gj@denx.de>
   6  * David Mueller <d.mueller@elsoft.ch>
   7  *
   8  * Configuation settings for the SAMSUNG SMDK2410 board.
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #ifndef __CONFIG_H
  30 #define __CONFIG_H
  31
  32 /*
  33  * If we are developing, we might want to start armboot from ram
  34  * so we MUST NOT initialize critical regs like mem-timing ...
  35  */
  36 #define CONFIG_INIT_CRITICAL            /* undef for developing */
  37
  38 /*
  39  * High Level Configuration Options
  40  * (easy to change)
  41  */
  42 #define CONFIG_ARM920T          1       /* This is an ARM920T Core      */
  43 #define CONFIG_S3C2410          1       /* in a SAMSUNG S3C2410 SoC     */
  44 #define CONFIG_SMDK2410         1       /* on a SAMSUNG SMDK2410 Board  */
  45
  46 /* input clock of PLL */
  47 #define CONFIG_SYS_CLK_FREQ     12000000/* the SMDK2410 has 12MHz input clock */
  48
  49
  50 #define USE_920T_MMU            1
  51 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  52
  53 /*
  54  * Size of malloc() pool
  55  */
  56 #define CFG_MALLOC_LEN          (CFG_ENV_SIZE + 128*1024)
  57 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
  58
  59 /*
  60  * Hardware drivers
  61  */
  62 #define CONFIG_DRIVER_CS8900    1       /* we have a CS8900 on-board */
  63 #define CS8900_BASE             0x19000300
  64 #define CS8900_BUS16            1 /* the Linux driver does accesses as shorts */
  65
  66 /*
  67  * select serial console configuration
  68  */
  69 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on SMDK2410 */
  70
  71 /************************************************************
  72  * RTC
  73  ************************************************************/
  74 #define CONFIG_RTC_S3C24X0      1
  75
  76 /* allow to overwrite serial and ethaddr */
  77 #define CONFIG_ENV_OVERWRITE
  78
  79 #define CONFIG_BAUDRATE         115200
  80
  81 /***********************************************************
  82  * Command definition
  83  ***********************************************************/
  84 #define CONFIG_COMMANDS \
  85                         (CONFIG_CMD_DFL  | \
  86                         CFG_CMD_CACHE    | \
  87                         /*CFG_CMD_NAND   |*/ \
  88                         /*CFG_CMD_EEPROM |*/ \
  89                         /*CFG_CMD_I2C    |*/ \
  90                         /*CFG_CMD_USB    |*/ \
  91                         CFG_CMD_REGINFO  | \
  92                         CFG_CMD_DATE     | \
  93                         CFG_CMD_ELF)
  94
  95 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  96 #include <cmd_confdefs.h>
  97
  98 #define CONFIG_BOOTDELAY        3
  99 /*#define CONFIG_BOOTARGS       "root=ramfs devfs=mount console=ttySA0,9600" */
 100 /*#define CONFIG_ETHADDR        08:00:3e:26:0a:5b */
 101 #define CONFIG_NETMASK          255.255.255.0
 102 #define CONFIG_IPADDR           10.0.0.110
 103 #define CONFIG_SERVERIP         10.0.0.1
 104 /*#define CONFIG_BOOTFILE       "elinos-lart" */
 105 /*#define CONFIG_BOOTCOMMAND    "tftp; bootm" */
 106
 107 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 108 #define CONFIG_KGDB_BAUDRATE    115200          /* speed to run kgdb serial port */
 109 /* what's this ? it's not used anywhere */
 110 #define CONFIG_KGDB_SER_INDEX   1               /* which serial port to use */
 111 #endif
 112
 113 /*
 114  * Miscellaneous configurable options
 115  */
 116 #define CFG_LONGHELP                            /* undef to save memory         */
 117 #define CFG_PROMPT              "SMDK2410 # "   /* Monitor Command Prompt       */
 118 #define CFG_CBSIZE              256             /* Console I/O Buffer Size      */
 119 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 120 #define CFG_MAXARGS             16              /* max number of command args   */
 121 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 122
 123 #define CFG_MEMTEST_START       0x30000000      /* memtest works on     */
 124 #define CFG_MEMTEST_END         0x33F00000      /* 63 MB in DRAM        */
 125
 126 #undef  CFG_CLKS_IN_HZ          /* everything, incl board info, in Hz */
 127
 128 #define CFG_LOAD_ADDR           0x33000000      /* default load address */
 129
 130 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
 131 /* it to wrap 100 times (total 1562500) to get 1 sec. */
 132 #define CFG_HZ                  1562500
 133
 134 /* valid baudrates */
 135 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 136
 137 /*-----------------------------------------------------------------------
 138  * Stack sizes
 139  *
 140  * The stack sizes are set up in start.S using the settings below
 141  */
 142 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 143 #ifdef CONFIG_USE_IRQ
 144 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 145 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 146 #endif
 147
 148 /*-----------------------------------------------------------------------
 149  * Physical Memory Map
 150  */
 151 #define CONFIG_NR_DRAM_BANKS    1          /* we have 1 bank of DRAM */
 152 #define PHYS_SDRAM_1            0x30000000 /* SDRAM Bank #1 */
 153 #define PHYS_SDRAM_1_SIZE       0x04000000 /* 64 MB */
 154
 155 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
 156
 157 #define CFG_FLASH_BASE          PHYS_FLASH_1
 158
 159 /*-----------------------------------------------------------------------
 160  * FLASH and environment organization
 161  */
 162
 163 #define CONFIG_AMD_LV400        1       /* uncomment this if you have a LV400 flash */
 164 #if 0
 165 #define CONFIG_AMD_LV800        1       /* uncomment this if you have a LV800 flash */
 166 #endif
 167
 168 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks */
 169 #ifdef CONFIG_AMD_LV800
 170 #define PHYS_FLASH_SIZE         0x00100000 /* 1MB */
 171 #define CFG_MAX_FLASH_SECT      (19)    /* max number of sectors on one chip */
 172 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
 173 #endif
 174 #ifdef CONFIG_AMD_LV400
 175 #define PHYS_FLASH_SIZE         0x00080000 /* 512KB */
 176 #define CFG_MAX_FLASH_SECT      (11)    /* max number of sectors on one chip */
 177 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x070000) /* addr of environment */
 178 #endif
 179
 180 /* timeout values are in ticks */
 181 #define CFG_FLASH_ERASE_TOUT    (5*CFG_HZ) /* Timeout for Flash Erase */
 182 #define CFG_FLASH_WRITE_TOUT    (5*CFG_HZ) /* Timeout for Flash Write */
 183
 184 #define CFG_ENV_IS_IN_FLASH     1
 185 #define CFG_ENV_SIZE            0x10000 /* Total Size of Environment Sector */
 186
 187 #endif  /* __CONFIG_H */