include/configs/smdk6400.h

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  * Gary Jennejohn <garyj@denx.de>
   6  * David Mueller <d.mueller@elsoft.ch>
   7  *
   8  * (C) Copyright 2008
   9  * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
  10  *
  11  * Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31
  32 #ifndef __CONFIG_H
  33 #define __CONFIG_H
  34
  35 /*
  36  * High Level Configuration Options
  37  * (easy to change)
  38  */
  39 #define CONFIG_S3C6400          1       /* in a SAMSUNG S3C6400 SoC     */
  40 #define CONFIG_S3C64XX          1       /* in a SAMSUNG S3C64XX Family  */
  41 #define CONFIG_SMDK6400         1       /* on a SAMSUNG SMDK6400 Board  */
  42
  43 #define CONFIG_SYS_SDRAM_BASE   0x50000000
  44
  45 /* input clock of PLL: SMDK6400 has 12MHz input clock */
  46 #define CONFIG_SYS_CLK_FREQ     12000000
  47
  48 #if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000)
  49 #define CONFIG_ENABLE_MMU
  50 #endif
  51
  52 #define CONFIG_MEMORY_UPPER_CODE
  53
  54 #define CONFIG_SETUP_MEMORY_TAGS
  55 #define CONFIG_CMDLINE_TAG
  56 #define CONFIG_INITRD_TAG
  57
  58 /*
  59  * Architecture magic and machine type
  60  */
  61 #define MACH_TYPE               1270
  62
  63 #define CONFIG_DISPLAY_CPUINFO
  64 #define CONFIG_DISPLAY_BOARDINFO
  65
  66 #undef CONFIG_SKIP_RELOCATE_UBOOT
  67
  68 /*
  69  * Size of malloc() pool
  70  */
  71 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  72 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes for initial data */
  73
  74 /*
  75  * Hardware drivers
  76  */
  77 #define CONFIG_DRIVER_CS8900    1       /* we have a CS8900 on-board    */
  78 #define CS8900_BASE             0x18800300
  79 #define CS8900_BUS16            1       /* follow the Linux driver      */
  80
  81 /*
  82  * select serial console configuration
  83  */
  84 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on SMDK6400  */
  85
  86 #define CONFIG_SYS_HUSH_PARSER                  /* use "hush" command parser    */
  87 #ifdef CONFIG_SYS_HUSH_PARSER
  88 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
  89 #endif
  90
  91 #define CONFIG_CMDLINE_EDITING
  92
  93 /* allow to overwrite serial and ethaddr */
  94 #define CONFIG_ENV_OVERWRITE
  95
  96 #define CONFIG_BAUDRATE         115200
  97
  98 /***********************************************************
  99  * Command definition
 100  ***********************************************************/
 101 #include <config_cmd_default.h>
 102
 103 #define CONFIG_CMD_CACHE
 104 #define CONFIG_CMD_REGINFO
 105 #define CONFIG_CMD_LOADS
 106 #define CONFIG_CMD_LOADB
 107 #define CONFIG_CMD_SAVEENV
 108 #define CONFIG_CMD_NAND
 109 #if defined(CONFIG_BOOT_ONENAND)
 110 #define CONFIG_CMD_ONENAND
 111 #endif
 112 #define CONFIG_CMD_PING
 113 #define CONFIG_CMD_ELF
 114 #define CONFIG_CMD_FAT
 115 #define CONFIG_CMD_EXT2
 116
 117 #define CONFIG_BOOTDELAY        3
 118
 119 #define CONFIG_ZERO_BOOTDELAY_CHECK
 120
 121 #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
 122 #define CONFIG_KGDB_BAUDRATE    115200  /* speed to run kgdb serial port */
 123 #define CONFIG_KGDB_SER_INDEX   1       /* which serial port to use      */
 124 #endif
 125
 126 /*
 127  * Miscellaneous configurable options
 128  */
 129 #define CONFIG_SYS_LONGHELP                             /* undef to save memory       */
 130 #define CONFIG_SYS_PROMPT               "SMDK6400 # "   /* Monitor Command Prompt     */
 131 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size    */
 132 #define CONFIG_SYS_PBSIZE               384             /* Print Buffer Size          */
 133 #define CONFIG_SYS_MAXARGS              16              /* max number of command args */
 134 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size  */
 135
 136 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE   /* memtest works on           */
 137 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
 138
 139 #define CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_SDRAM_BASE   /* default load address */
 140
 141 #define CONFIG_SYS_HZ                   1000
 142
 143 /* valid baudrates */
 144 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 145
 146 /*-----------------------------------------------------------------------
 147  * Stack sizes
 148  *
 149  * The stack sizes are set up in start.S using the settings below
 150  */
 151 #define CONFIG_STACKSIZE        0x40000         /* regular stack 256KB */
 152
 153 /**********************************
 154  Support Clock Settings
 155  **********************************
 156  Setting        SYNC    ASYNC
 157  ----------------------------------
 158  667_133_66      X        O
 159  533_133_66      O        O
 160  400_133_66      X        O
 161  400_100_50      O        O
 162  **********************************/
 163
 164 /*#define CONFIG_CLK_667_133_66*/
 165 #define CONFIG_CLK_533_133_66
 166 /*
 167 #define CONFIG_CLK_400_100_50
 168 #define CONFIG_CLK_400_133_66
 169 #define CONFIG_SYNC_MODE
 170 */
 171
 172 /* SMDK6400 has 2 banks of DRAM, but we use only one in U-Boot */
 173 #define CONFIG_NR_DRAM_BANKS    1
 174 #define PHYS_SDRAM_1            CONFIG_SYS_SDRAM_BASE   /* SDRAM Bank #1        */
 175 #define PHYS_SDRAM_1_SIZE       0x08000000      /* 128 MB in Bank #1    */
 176
 177 #define CONFIG_SYS_FLASH_BASE           0x10000000
 178 #define CONFIG_SYS_MONITOR_BASE 0x00000000
 179
 180 /*-----------------------------------------------------------------------
 181  * FLASH and environment organization
 182  */
 183 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks   */
 184 /* AM29LV160B has 35 sectors, AM29LV800B - 19 */
 185 #define CONFIG_SYS_MAX_FLASH_SECT       40
 186
 187 #define CONFIG_AMD_LV800
 188 #define CONFIG_SYS_FLASH_CFI            1       /* Use CFI parameters (needed?) */
 189 /* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant  */
 190 #define CONFIG_FLASH_CFI_DRIVER 1
 191 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
 192 #define CONFIG_FLASH_CFI_LEGACY
 193 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
 194
 195 /* timeout values are in ticks */
 196 #define CONFIG_SYS_FLASH_ERASE_TOUT     (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase  */
 197 #define CONFIG_SYS_FLASH_WRITE_TOUT     (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write  */
 198
 199 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector */
 200
 201 /*
 202  * SMDK6400 board specific data
 203  */
 204
 205 #define CONFIG_IDENT_STRING     " for SMDK6400"
 206
 207 /* base address for uboot */
 208 #define CONFIG_SYS_PHY_UBOOT_BASE       (CONFIG_SYS_SDRAM_BASE + 0x07e00000)
 209 /* total memory available to uboot */
 210 #define CONFIG_SYS_UBOOT_SIZE           (1024 * 1024)
 211
 212 #ifdef CONFIG_ENABLE_MMU
 213 #define CONFIG_SYS_MAPPED_RAM_BASE      0xc0000000
 214 #define CONFIG_BOOTCOMMAND      "nand read 0xc0018000 0x60000 0x1c0000;" \
 215                                 "bootm 0xc0018000"
 216 #else
 217 #define CONFIG_SYS_MAPPED_RAM_BASE      CONFIG_SYS_SDRAM_BASE
 218 #define CONFIG_BOOTCOMMAND      "nand read 0x50018000 0x60000 0x1c0000;" \
 219                                 "bootm 0x50018000"
 220 #endif
 221
 222 /* NAND U-Boot load and start address */
 223 #define CONFIG_SYS_UBOOT_BASE           (CONFIG_SYS_MAPPED_RAM_BASE + 0x07e00000)
 224
 225 #define CONFIG_ENV_OFFSET               0x0040000
 226
 227 /* NAND configuration */
 228 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 229 #define CONFIG_SYS_NAND_BASE            0x70200010
 230 #define CONFIG_SYS_S3C_NAND_HWECC
 231
 232 #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I  1  /* ".i" read skips bad blocks              */
 233 #define CONFIG_SYS_NAND_WP              1
 234 #define CONFIG_SYS_NAND_YAFFS_WRITE     1  /* support yaffs write                     */
 235 #define CONFIG_SYS_NAND_BBT_2NDPAGE     1  /* bad-block markers in 1st and 2nd pages  */
 236
 237 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_PHY_UBOOT_BASE       /* NUB load-addr      */
 238 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_NAND_U_BOOT_DST      /* NUB start-addr     */
 239
 240 #define CONFIG_SYS_NAND_U_BOOT_OFFS     (4 * 1024)      /* Offset to RAM U-Boot image */
 241 #define CONFIG_SYS_NAND_U_BOOT_SIZE     (252 * 1024)    /* Size of RAM U-Boot image   */
 242
 243 /* NAND chip page size          */
 244 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 245 /* NAND chip block size         */
 246 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 247 /* NAND chip page per block count  */
 248 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 249 /* Location of the bad-block label */
 250 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 251 /* Extra address cycle for > 128MiB */
 252 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 253
 254 /* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
 255 #define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
 256 /* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
 257 #define CONFIG_SYS_NAND_ECCBYTES        4
 258 /* Number of ECC-blocks per NAND page */
 259 #define CONFIG_SYS_NAND_ECCSTEPS        (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
 260 /* Size of a single OOB region */
 261 #define CONFIG_SYS_NAND_OOBSIZE 64
 262 /* Number of ECC bytes per page */
 263 #define CONFIG_SYS_NAND_ECCTOTAL        (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
 264 /* ECC byte positions */
 265 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47, \
 266                                  48, 49, 50, 51, 52, 53, 54, 55, \
 267                                  56, 57, 58, 59, 60, 61, 62, 63}
 268
 269 /* Boot configuration (define only one of next 3) */
 270 #define CONFIG_BOOT_NAND
 271 /* None of these are currently implemented. Left from the original Samsung
 272  * version for reference
 273 #define CONFIG_BOOT_NOR
 274 #define CONFIG_BOOT_MOVINAND
 275 #define CONFIG_BOOT_ONENAND
 276 */
 277
 278 #define CONFIG_NAND
 279 #define CONFIG_NAND_S3C64XX
 280 /* Unimplemented or unsupported. See comment above.
 281 #define CONFIG_ONENAND
 282 #define CONFIG_MOVINAND
 283 */
 284
 285 /* Settings as above boot configuration */
 286 #define CONFIG_ENV_IS_IN_NAND
 287 #define CONFIG_BOOTARGS         "console=ttySAC,115200"
 288
 289 #if !defined(CONFIG_ENABLE_MMU)
 290 #define CONFIG_CMD_USB                  1
 291 #define CONFIG_USB_S3C64XX
 292 #define CONFIG_USB_OHCI_NEW             1
 293 #define CONFIG_SYS_USB_OHCI_REGS_BASE           0x74300000
 294 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "s3c6400"
 295 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
 296 #define CONFIG_SYS_USB_OHCI_CPU_INIT            1
 297
 298 #define CONFIG_USB_STORAGE      1
 299 #endif
 300 #define CONFIG_DOS_PARTITION    1
 301
 302 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_ENABLE_MMU)
 303 # error "usb_ohci.c is currently broken with MMU enabled."
 304 #endif
 305
 306 #endif  /* __CONFIG_H */