include/configs/snowball.h

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2009
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __CONFIG_H
   8 #define __CONFIG_H
   9
  10 /*
  11  * #define DEBUG 1
  12  */
  13
  14 #define CONFIG_SKIP_LOWLEVEL_INIT
  15 #define CONFIG_SNOWBALL
  16 #define CONFIG_SYS_ICACHE_OFF
  17 #define CONFIG_SYS_DCACHE_OFF
  18 #define CONFIG_ARCH_CPU_INIT
  19 #define CONFIG_BOARD_LATE_INIT
  20
  21 /*
  22  * High Level Configuration Options
  23  * (easy to change)
  24  */
  25 #define CONFIG_U8500
  26
  27 #define CONFIG_SYS_MEMTEST_START        0x00000000
  28 #define CONFIG_SYS_MEMTEST_END  0x1FFFFFFF
  29
  30 /*-----------------------------------------------------------------------
  31  * Size of environment and malloc() pool
  32  */
  33 /*
  34  * If you use U-Boot as crash kernel, make sure that it does not overwrite
  35  * information saved by kexec during panic. Kexec expects the start
  36  * address of the executable 32K above "crashkernel" address.
  37  */
  38 /*
  39  * Size of malloc() pool
  40  */
  41 #define CONFIG_ENV_SIZE         (8*1024)
  42 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 256*1024)
  43
  44 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* for initial data */
  45
  46 #define CONFIG_ENV_IS_IN_MMC
  47 #define CONFIG_CMD_ENV
  48 #define CONFIG_CMD_SAVEENV
  49 #define CONFIG_ENV_OFFSET               0x0118000
  50 #define CONFIG_SYS_MMC_ENV_DEV          0              /* SLOT2: eMMC */
  51
  52 /*
  53  * PL011 Configuration
  54  */
  55 #define CONFIG_PL011_SERIAL
  56 #define CONFIG_PL011_SERIAL_RLCR
  57 #define CONFIG_PL011_SERIAL_FLUSH_ON_INIT
  58
  59 /*
  60  * U8500 UART registers base for 3 serial devices
  61  */
  62 #define CFG_UART0_BASE          0x80120000
  63 #define CFG_UART1_BASE          0x80121000
  64 #define CFG_UART2_BASE          0x80007000
  65 #define CFG_SERIAL0             CFG_UART0_BASE
  66 #define CFG_SERIAL1             CFG_UART1_BASE
  67 #define CFG_SERIAL2             CFG_UART2_BASE
  68 #define CONFIG_PL011_CLOCK      38400000
  69 #define CONFIG_PL01x_PORTS      { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \
  70                                   (void *)CFG_SERIAL2 }
  71 #define CONFIG_CONS_INDEX       2
  72 #define CONFIG_BAUDRATE         115200
  73
  74 /*
  75  * Devices and file systems
  76  */
  77 #define CONFIG_MMC
  78 #define CONFIG_GENERIC_MMC
  79 #define CONFIG_DOS_PARTITION
  80
  81 /*
  82  * Commands
  83  */
  84 #define CONFIG_CMD_MEMORY
  85 #define CONFIG_CMD_BOOTD
  86 #define CONFIG_CMD_BDI
  87 #define CONFIG_CMD_IMI
  88 #define CONFIG_CMD_MISC
  89 #define CONFIG_CMD_RUN
  90 #define CONFIG_CMD_ECHO
  91 #define CONFIG_CMD_CONSOLE
  92 #define CONFIG_CMD_LOADS
  93 #define CONFIG_CMD_LOADB
  94 #define CONFIG_CMD_MMC
  95 #define CONFIG_CMD_FAT
  96 #define CONFIG_CMD_EXT2
  97 #define CONFIG_CMD_SOURCE
  98
  99 #ifndef CONFIG_BOOTDELAY
 100 #define CONFIG_BOOTDELAY        1
 101 #endif
 102 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 103
 104 #undef CONFIG_BOOTARGS
 105 #define CONFIG_BOOTCOMMAND \
 106 "mmc dev 1; "                                                           \
 107         "if run loadbootscript; "                                       \
 108                 "then run bootscript; "                                 \
 109         "else "                                                         \
 110                 "if run mmcload; "                                      \
 111                         "then run mmcboot; "                            \
 112                 "else "                                                 \
 113                         "mmc dev 0; "                                   \
 114                         "if run emmcloadbootscript; "                   \
 115                                 "then run bootscript; "                 \
 116                         "else "                                         \
 117                                 "if run emmcload; "                     \
 118                                         "then run emmcboot; "           \
 119                                 "else "                                 \
 120                                         "echo No media to boot from; "  \
 121                                 "fi; "                                  \
 122                         "fi; "                                          \
 123                 "fi; "                                                  \
 124         "fi; "
 125
 126 #define CONFIG_EXTRA_ENV_SETTINGS \
 127         "verify=n\0"                                                    \
 128         "loadaddr=0x00100000\0"                                         \
 129         "console=ttyAMA2,115200n8\0"                                    \
 130         "loadbootscript=fatload mmc 1:1 ${loadaddr} boot.scr\0"         \
 131         "emmcloadbootscript=fatload mmc 0:2 ${loadaddr} boot.scr\0"     \
 132         "bootscript=echo Running bootscript "                           \
 133                 "from mmc ...; source ${loadaddr}\0"                    \
 134         "memargs256=mem=96M@0 mem_modem=32M@96M mem=32M@128M "          \
 135                 "hwmem=22M@160M pmem_hwb=42M@182M mem_mali=32@224M\0"   \
 136         "memargs512=mem=96M@0 mem_modem=32M@96M hwmem=32M@128M "        \
 137                 "mem=64M@160M mem_mali=32M@224M "                       \
 138                 "pmem_hwb=128M@256M mem=128M@384M\0"                    \
 139         "memargs1024=mem=128M@0 mali.mali_mem=32M@128M "                \
 140                 "hwmem=168M@M160M mem=48M@328M "                        \
 141                 "mem_issw=1M@383M mem=640M@384M\0"                      \
 142         "memargs=setenv bootargs ${bootargs} ${memargs1024}\0"          \
 143         "emmcload=fatload mmc 0:2 ${loadaddr} uImage\0"                 \
 144         "mmcload=fatload mmc 1:1 ${loadaddr} uImage\0"                  \
 145         "commonargs=setenv bootargs console=${console} "                \
 146         "vmalloc=300M\0"                                                \
 147         "emmcargs=setenv bootargs ${bootargs} "                         \
 148                 "root=/dev/mmcblk0p3 "                                  \
 149                 "rootwait\0"                                            \
 150         "addcons=setenv bootargs ${bootargs} "                          \
 151                 "console=${console}\0"                                  \
 152         "emmcboot=echo Booting from eMMC ...; "                         \
 153                 "run commonargs emmcargs memargs; "                     \
 154                 "bootm ${loadaddr}\0"                                   \
 155         "mmcargs=setenv bootargs ${bootargs} "                          \
 156                 "root=/dev/mmcblk1p2 "                                  \
 157                 "rootwait earlyprintk\0"                                \
 158         "mmcboot=echo Booting from external MMC ...; "                  \
 159                 "run commonargs mmcargs memargs; "                      \
 160                 "bootm ${loadaddr}\0"                                   \
 161         "fdt_high=0x2BC00000\0"                                         \
 162         "stdout=serial,usbtty\0"                                        \
 163         "stdin=serial,usbtty\0"                                         \
 164         "stderr=serial,usbtty\0"
 165
 166 /*-----------------------------------------------------------------------
 167  * Miscellaneous configurable options
 168  */
 169
 170 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 171 #define CONFIG_SYS_PROMPT       "U8500 $ "      /* Monitor Command Prompt   */
 172 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size  */
 173
 174 /* Print Buffer Size */
 175 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE \
 176                                         + sizeof(CONFIG_SYS_PROMPT) + 16)
 177 #define CONFIG_SYS_MAXARGS      32      /* max number of command args */
 178 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
 179
 180 #undef  CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
 181 #define CONFIG_SYS_LOAD_ADDR            0x00100000 /* default load address */
 182 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1
 183
 184 #define CONFIG_SYS_HUSH_PARSER          1
 185 #define CONFIG_CMDLINE_EDITING
 186
 187 #define CONFIG_SETUP_MEMORY_TAGS        2
 188 #define CONFIG_INITRD_TAG               1
 189 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs  */
 190
 191 /*
 192  * Physical Memory Map
 193  */
 194 #define CONFIG_NR_DRAM_BANKS            1
 195 #define PHYS_SDRAM_1                    0x00000000      /* DDR-SDRAM Bank #1 */
 196
 197 /*
 198  * additions for new relocation code
 199  */
 200 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 201 #define CONFIG_SYS_MAX_RAM_SIZE 0x40000000
 202 #define CONFIG_SYS_INIT_RAM_SIZE        0x100000
 203 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_SDRAM_BASE + \
 204                                          CONFIG_SYS_INIT_RAM_SIZE - \
 205                                          GENERATED_GBL_DATA_SIZE)
 206 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_GBL_DATA_OFFSET
 207
 208 /* landing address before relocation */
 209 #ifndef CONFIG_SYS_TEXT_BASE
 210 #define CONFIG_SYS_TEXT_BASE            0x0
 211 #endif
 212
 213 /*
 214  * MMC related configs
 215  */
 216 #define CONFIG_ARM_PL180_MMCI
 217 #define MMC_BLOCK_SIZE                  512
 218 #define CFG_EMMC_BASE                   0x80114000
 219 #define CFG_MMC_BASE                    0x80126000
 220
 221 /*
 222  * FLASH and environment organization
 223  */
 224 #define CONFIG_SYS_NO_FLASH
 225
 226 /*
 227  * base register values for U8500
 228  */
 229 #define CFG_PRCMU_BASE          0x80157000      /* Power, reset and clock */
 230
 231
 232 /*
 233  * U8500 GPIO register base for 9 banks
 234  */
 235 #define CONFIG_DB8500_GPIO
 236 #define CFG_GPIO_0_BASE                 0x8012E000
 237 #define CFG_GPIO_1_BASE                 0x8012E080
 238 #define CFG_GPIO_2_BASE                 0x8000E000
 239 #define CFG_GPIO_3_BASE                 0x8000E080
 240 #define CFG_GPIO_4_BASE                 0x8000E100
 241 #define CFG_GPIO_5_BASE                 0x8000E180
 242 #define CFG_GPIO_6_BASE                 0x8011E000
 243 #define CFG_GPIO_7_BASE                 0x8011E080
 244 #define CFG_GPIO_8_BASE                 0xA03FE000
 245
 246 #define CFG_FSMC_BASE           0x80000000      /* FSMC Controller */
 247
 248 #endif  /* __CONFIG_H */