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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
4 * (C) Copyright 2013 Siemens AG
5 *
6 * Based on:
7 * U-Boot file: include/configs/at91sam9260ek.h
8 *
9 * (C) Copyright 2007-2008
10 * Stelian Pop <stelian@popies.net>
11 * Lead Tech Design <www.leadtechdesign.com>
12 */
13
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16
17 /*
18 * SoC must be defined first, before hardware.h is included.
19 * In this case SoC is defined in boards.cfg.
20 */
21 #include <asm/hardware.h>
22 #include <linux/sizes.h>
23
24 /*
25 * Warning: changing CONFIG_SYS_TEXT_BASE requires
26 * adapting the initial boot program.
27 * Since the linker has to swallow that define, we must use a pure
28 * hex number here!
29 */
30
31 /* ARM asynchronous clock */
32 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
33 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
34
35 /* Misc CPU related */
36 #define CONFIG_ARCH_CPU_INIT
37 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
38 #define CONFIG_SETUP_MEMORY_TAGS
39 #define CONFIG_INITRD_TAG
40
41 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
42
43 /* general purpose I/O */
44 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
45 #define CONFIG_AT91_GPIO
46 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
47
48 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
49 #define CONFIG_USART_ID ATMEL_ID_SYS
50
51 /*
52 * SDRAM: 1 bank, min 32, max 128 MB
53 * Initialized before u-boot gets started.
54 */
55 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
56 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
57
58 /*
59 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
60 * leaving the correct space for initial global data structure above
61 * that address while providing maximum stack area below.
62 */
63 #define CONFIG_SYS_INIT_SP_ADDR \
64 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
65
66 /* NAND flash */
67 #ifdef CONFIG_CMD_NAND
68 #define CONFIG_SYS_MAX_NAND_DEVICE 1
69 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
70 #define CONFIG_SYS_NAND_DBW_8
71 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
72 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
73 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
74 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
75 #endif
76
77 /* Ethernet */
78 #define CONFIG_MACB
79 #define CONFIG_RMII
80 #define CONFIG_AT91_WANTS_COMMON_PHY
81
82 /* USB */
83 #if defined(CONFIG_BOARD_TAURUS)
84 #define CONFIG_USB_ATMEL
85 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
86 #define CONFIG_USB_OHCI_NEW
87 #define CONFIG_SYS_USB_OHCI_CPU_INIT
88 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
89 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
90 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
91
92 /* USB DFU support */
93
94 #define CONFIG_USB_GADGET_AT91
95
96 /* DFU class support */
97 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
98 #define DFU_MANIFEST_POLL_TIMEOUT 25000
99 #endif
100
101 /* SPI EEPROM */
102 #define TAURUS_SPI_MASK (1 << 4)
103
104 #if defined(CONFIG_SPL_BUILD)
105 /* SPL related */
106 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
107 #endif
108
109 /* load address */
110 #define CONFIG_SYS_LOAD_ADDR 0x22000000
111
112 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
113 #define CONFIG_ENV_OFFSET 0x100000
114 #define CONFIG_ENV_OFFSET_REDUND 0x180000
115 #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
116
117 #ifndef CONFIG_SPL_BUILD
118 #if defined(CONFIG_BOARD_AXM)
119 #define CONFIG_EXTRA_ENV_SETTINGS \
120 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
121 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
122 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
123 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
124 "boot_retries=0\0" \
125 "ethact=macb0\0" \
126 "flash_nfs=run nand_kernel;run nfsargs;run addip;" \
127 "upgrade_available;bootm ${kernel_ram};reset\0" \
128 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
129 "bootm ${kernel_ram};reset\0" \
130 "flash_self_test=run nand_kernel;run setbootargs addtest;" \
131 "upgrade_available;bootm ${kernel_ram};reset\0" \
132 "hostname=systemone\0" \
133 "kernel_Off=0x00200000\0" \
134 "kernel_Off_fallback=0x03800000\0" \
135 "kernel_ram=0x21500000\0" \
136 "kernel_size=0x00400000\0" \
137 "kernel_size_fallback=0x00400000\0" \
138 "loads_echo=1\0" \
139 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
140 "${kernel_size}\0" \
141 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
142 "run nfsargs;run addip;upgrade_available;" \
143 "bootm ${kernel_ram};reset\0" \
144 "netdev=eth0\0" \
145 "nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
146 "rw nfsroot=${serverip}:${rootpath} " \
147 "at91sam9_wdt.wdt_timeout=16\0" \
148 "partitionset_active=A\0" \
149 "preboot=echo;echo Type 'run flash_self' to use kernel and root " \
150 "filesystem on memory;echo Type 'run flash_nfs' to use " \
151 "kernel from memory and root filesystem over NFS;echo Type " \
152 "'run net_nfs' to get Kernel over TFTP and mount root " \
153 "filesystem over NFS;echo\0" \
154 "project_dir=systemone\0" \
155 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
156 "rootfs=/dev/mtdblock5\0" \
157 "rootfs_fallback=/dev/mtdblock7\0" \
158 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
159 "root=${rootfs} rootfstype=jffs2 panic=7 " \
160 "at91sam9_wdt.wdt_timeout=16\0" \
161 "stderr=serial\0" \
162 "stdin=serial\0" \
163 "stdout=serial\0" \
164 "upgrade_available=0\0"
165 #endif
166 #endif /* #ifndef CONFIG_SPL_BUILD */
167 /*
168 * Size of malloc() pool
169 */
170 #define CONFIG_SYS_MALLOC_LEN \
171 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
172
173 /* Defines for SPL */
174 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
175 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
176 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
177 CONFIG_SYS_MALLOC_LEN)
178 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
179
180 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
181 #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
182
183 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
184 #define CONFIG_SYS_USE_NANDFLASH 1
185 #define CONFIG_SPL_NAND_DRIVERS
186 #define CONFIG_SPL_NAND_BASE
187 #define CONFIG_SPL_NAND_ECC
188 #define CONFIG_SPL_NAND_RAW_ONLY
189 #define CONFIG_SPL_NAND_SOFTECC
190 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
191 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
192 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
193 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
194 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
195
196 #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
197 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
198 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
199 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
200 CONFIG_SYS_NAND_PAGE_SIZE)
201 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
202 #define CONFIG_SYS_NAND_ECCSIZE 256
203 #define CONFIG_SYS_NAND_ECCBYTES 3
204 #define CONFIG_SYS_NAND_OOBSIZE 64
205 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
206 48, 49, 50, 51, 52, 53, 54, 55, \
207 56, 57, 58, 59, 60, 61, 62, 63, }
208
209 #define CONFIG_SPL_ATMEL_SIZE
210 #define CONFIG_SYS_MASTER_CLOCK 132096000
211 #define AT91_PLL_LOCK_TIMEOUT 1000000
212 #define CONFIG_SYS_AT91_PLLA 0x202A3F01
213 #define CONFIG_SYS_MCKR 0x1300
214 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
215 #define CONFIG_SYS_AT91_PLLB 0x10193F05
216
217 #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
218 #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
219
220 #endif