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1 /*
2 * (C) Copyright 2010
3 * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
4 *
5 * Configuation settings for the TOP9000 CPU module with AT91SAM9XE.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25 /*
26 * top9000 with at91sam9xe256 or at91sam9xe512
27 *
28 * Initial Bootloader is in embedded flash.
29 * Vital Product Data, U-Boot Environment are in I2C-EEPROM.
30 * U-Boot is in embedded flash, a backup U-Boot can be in NAND flash.
31 * kernel and file system are either in NAND flash or on a micro SD card.
32 * NAND flash is optional.
33 * I2C EEPROM is never optional.
34 * SPI FRAM is optional.
35 * SPI ENC28J60 is optional.
36 * 16 or 32 bit wide SDRAM.
37 */
38 #ifndef __CONFIG_H
39 #define __CONFIG_H
40
41 /* SoC must be defined first, before hardware.h is included */
42 #define CONFIG_AT91SAM9XE
43 #include <asm/hardware.h>
44
45 /*
46 * Warning: changing CONFIG_SYS_TEXT_BASE requires
47 * adapting the initial boot program.
48 */
49 #define CONFIG_SYS_TEXT_BASE 0x20000000 /* start of SDRAM */
50
51 /* Command line configuration */
52 #include <config_cmd_default.h>
53 #undef CONFIG_CMD_FPGA
54 #undef CONFIG_CMD_SETGETDCR
55 #undef CONFIG_CMD_XIMG
56 #define CONFIG_CMD_ASKENV
57 #define CONFIG_SYS_CBSIZE 256
58 #define CONFIG_SYS_MAXARGS 16
59 #define CONFIG_SYS_PBSIZE \
60 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
61 #define CONFIG_SYS_PROMPT "TOP9000> "
62 #define CONFIG_SYS_LONGHELP
63 #define CONFIG_CMDLINE_EDITING
64 #define CONFIG_CMD_BDI
65 #define CONFIG_CMD_CACHE
66
67 /* ARM asynchronous clock */
68 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
69 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
70 #define CONFIG_SYS_HZ 1000
71
72 /* Misc CPU related */
73 #define CONFIG_ARCH_CPU_INIT
74 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
75 #define CONFIG_SETUP_MEMORY_TAGS
76 #define CONFIG_INITRD_TAG
77 #define CONFIG_SKIP_LOWLEVEL_INIT
78 #define CONFIG_BOARD_EARLY_INIT_F
79 #define CONFIG_DISPLAY_CPUINFO
80 #define CONFIG_AT91RESET_EXTRST /* assert external reset */
81
82 /* general purpose I/O */
83 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
84 #define CONFIG_AT91_GPIO
85 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
86
87 /* serial console */
88 #define CONFIG_ATMEL_USART
89 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
90 #define CONFIG_USART_ID ATMEL_ID_SYS
91 #define CONFIG_BAUDRATE 115200
92
93 /* SD/MMC card */
94 #define CONFIG_MMC
95 #define CONFIG_GENERIC_MMC
96 #define CONFIG_GENERIC_ATMEL_MCI
97 #define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9
98 #define CONFIG_CMD_MMC
99
100 /* Ethernet */
101 #define CONFIG_MACB
102 #define CONFIG_SYS_PHY_ID 1
103 #define CONFIG_RMII
104 #define CONFIG_NET_RETRY_COUNT 20
105
106 /* real time clock */
107 #define CONFIG_RTC_AT91SAM9_RTT
108 #define CONFIG_CMD_DATE
109
110 #if defined(CONFIG_AT91SAM9XE)
111 /*
112 * NOR flash - use embedded flash of SAM9XE256/512
113 * U-Boot will not fit into 128K !
114 * 2010.09 will not fit into 256K with all options enabled !
115 *
116 * Layout:
117 * 16kB 1st Bootloader
118 * Rest U-Boot
119 * the first sector (16kB) of EFLASH cannot be unprotected
120 * with u-boot commands
121 */
122 # define CONFIG_AT91_EFLASH
123 # define CONFIG_SYS_FLASH_BASE ATMEL_BASE_FLASH
124 # define CONFIG_SYS_MAX_FLASH_SECT 32
125 # define CONFIG_SYS_MAX_FLASH_BANKS 1
126 # define CONFIG_SYS_FLASH_PROTECTION
127 # define CONFIG_EFLASH_PROTSECTORS 1 /* protect first sector */
128 #endif
129
130 /* SPI */
131 #define CONFIG_ATMEL_SPI
132 #define CONFIG_CMD_SPI
133
134 /* RAMTRON FRAM */
135 #define CONFIG_CMD_SF
136 #define CONFIG_ATMEL_SPI0 /* SPI used for FRAM is SPI0 */
137 #define FRAM_SPI_BUS 0
138 #define FRAM_CS_NUM 0
139 #define CONFIG_SPI_FLASH /* RAMTRON FRAM on SPI bus */
140 #define CONFIG_SPI_FRAM_RAMTRON
141 #define CONFIG_SF_DEFAULT_SPEED 1000000 /* be conservative here... */
142 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
143 #define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "FM25H20"
144
145 /* Microchip ENC28J60 (second LAN) */
146 #if defined(CONFIG_EVAL9000)
147 # define CONFIG_ENC28J60
148 # define CONFIG_ATMEL_SPI1 /* SPI used for ENC28J60 is SPI1 */
149 # define ENC_SPI_BUS 1
150 # define ENC_CS_NUM 0
151 # define ENC_SPI_CLOCK 1000000
152 #endif /* CONFIG_EVAL9000 */
153
154 /*
155 * SDRAM: 1 bank, min 32, max 128 MB
156 * Initialized before u-boot gets started.
157 */
158 #define CONFIG_NR_DRAM_BANKS 1
159 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
160 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
161 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
162 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01e00000)
163 #define CONFIG_SYS_LOAD_ADDR \
164 (CONFIG_SYS_SDRAM_BASE + 0x01000000)
165 /*
166 * Initial stack pointer: 16k - GENERATED_GBL_DATA_SIZE in internal SRAM,
167 * leaving the correct space for initial global data structure above
168 * that address while providing maximum stack area below.
169 */
170 #define CONFIG_SYS_INIT_SP_ADDR \
171 (ATMEL_BASE_SRAM + 0x4000 - GENERATED_GBL_DATA_SIZE)
172
173 /*
174 * NAND flash: 256 MB (optional)
175 *
176 * Layout:
177 * 640kB: u-boot (includes space for spare sectors, handled by
178 * initial loader)
179 * 2MB: kernel
180 * rest: file system
181 */
182 #define CONFIG_NAND_ATMEL
183 #define CONFIG_SYS_MAX_NAND_DEVICE 1
184 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
185 #define CONFIG_SYS_NAND_DBW_8
186 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
187 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
188 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
189 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
190 #define CONFIG_CMD_NAND
191
192 /* USB */
193 #define CONFIG_USB_ATMEL
194 #define CONFIG_USB_OHCI_NEW
195 #define CONFIG_DOS_PARTITION
196 #define CONFIG_SYS_USB_OHCI_CPU_INIT
197 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
198 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "top9000"
199 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
200 #define CONFIG_USB_STORAGE
201 #define CONFIG_CMD_USB
202
203 /* I2C support must always be enabled */
204 #define CONFIG_CMD_I2C
205 #define CONFIG_SYS_I2C
206 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
207 #define CONFIG_SYS_I2C_SOFT_SPEED 400000
208 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
209
210 #define I2C0_PORT AT91_PIO_PORTA
211 #define SDA0_PIN 23
212 #define SCL0_PIN 24
213 #define I2C1_PORT AT91_PIO_PORTB
214 #define SDA1_PIN 12
215 #define SCL1_PIN 13
216 #define I2C_SOFT_DECLARATIONS void iic_init(void);\
217 int iic_read(void);\
218 void iic_sda(int);\
219 void iic_scl(int);
220 #define I2C_ACTIVE
221 #define I2C_TRISTATE
222 #define I2C_INIT iic_init()
223 #define I2C_READ iic_read()
224 #define I2C_SDA(bit) iic_sda(bit)
225 #define I2C_SCL(bit) iic_scl(bit)
226 #define I2C_DELAY udelay(3)
227 /* EEPROM configuration */
228 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
229 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
230 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
231 #define CONFIG_SYS_EEPROM_SIZE 0x2000
232 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
233 /* later: #define CONFIG_I2C_ENV_EEPROM_BUS 0 */
234 /* ENV is always in I2C-EEPROM */
235 #define CONFIG_ENV_IS_IN_EEPROM
236 #define CONFIG_ENV_OFFSET 0x1000
237 #define CONFIG_ENV_SIZE 0x0f00
238 /* VPD settings */
239 #define CONFIG_SYS_I2C_FACT_ADDR 0x57
240 #define CONFIG_SYS_FACT_OFFSET 0x1F00
241 #define CONFIG_SYS_FACT_SIZE 0x0100
242 /* later: #define CONFIG_MISC_INIT_R */
243 /* define the next only if you want to allow users to enter VPD data */
244 #define CONFIG_SYS_FACT_ENTRY
245 #ifndef __ASSEMBLY__
246 extern void read_factory_r(void);
247 #endif
248
249 /*
250 * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
251 * data on the serial line may interrupt the boot sequence.
252 */
253 #define CONFIG_BOOTDELAY 1
254 #define CONFIG_AUTOBOOT
255 #define CONFIG_AUTOBOOT_KEYED
256 #define CONFIG_AUTOBOOT_PROMPT \
257 "Press SPACE to abort autoboot in %d seconds\n", bootdelay
258 #define CONFIG_AUTOBOOT_DELAY_STR "d"
259 #define CONFIG_AUTOBOOT_STOP_STR " "
260
261 /*
262 * add filesystem commands if we have at least 1 storage
263 * media with filesystem
264 */
265 #if defined(CONFIG_NAND_ATMEL) \
266 || defined(CONFIG_USB_ATMEL) \
267 || defined(CONFIG_MMC)
268 # define CONFIG_DOS_PARTITION
269 # define CONFIG_CMD_FAT
270 # define CONFIG_CMD_EXT2
271 /* later: #define CONFIG_CMD_JFFS2 */
272 #endif
273
274 /* add NET commands if we have at least 1 LAN */
275 #if defined(CONFIG_MACB) || defined(CONFIG_ENC28J60)
276 # define CONFIG_CMD_PING
277 # define CONFIG_CMD_DHCP
278 # define CONFIG_CMD_MII
279 /* is this really needed ? */
280 # define CONFIG_RESET_PHY_R
281 /* BOOTP options */
282 # define CONFIG_BOOTP_BOOTFILESIZE
283 # define CONFIG_BOOTP_BOOTPATH
284 # define CONFIG_BOOTP_GATEWAY
285 # define CONFIG_BOOTP_HOSTNAME
286 #endif
287
288 /* linux in NAND flash */
289 #define CONFIG_BOOTCOUNT_LIMIT 1
290 #define CONFIG_BOOTCOMMAND \
291 "nand read 0x21000000 0xA0000 0x200000; bootm"
292 #define CONFIG_BOOTARGS \
293 "console=ttyS0,115200 " \
294 "root=/dev/mtdblock2 " \
295 "mtdparts=atmel_nand:" \
296 "640k(uboot)ro," \
297 "2M(linux)," \
298 "16M(root)," \
299 "-(rest) " \
300 "rw "\
301 "rootfstype=jffs2"
302
303 /* Size of malloc() pool */
304 #define CONFIG_SYS_MALLOC_LEN \
305 ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
306
307 #endif