include/configs/trats.h

   1 /*
   2  * Copyright (C) 2011 Samsung Electronics
   3  * Heungjun Kim <riverful.kim@samsung.com>
   4  *
   5  * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #ifndef __CONFIG_H
  27 #define __CONFIG_H
  28
  29 /*
  30  * High Level Configuration Options
  31  * (easy to change)
  32  */
  33 #define CONFIG_SAMSUNG          /* in a SAMSUNG core */
  34 #define CONFIG_S5P              /* which is in a S5P Family */
  35 #define CONFIG_EXYNOS4210       /* which is in a EXYNOS4210 */
  36 #define CONFIG_TRATS            /* working with TRATS */
  37 #define CONFIG_TIZEN            /* TIZEN lib */
  38
  39 #include <asm/arch/cpu.h>       /* get chip and board defs */
  40
  41 #define CONFIG_ARCH_CPU_INIT
  42 #define CONFIG_DISPLAY_CPUINFO
  43 #define CONFIG_DISPLAY_BOARDINFO
  44
  45 #ifndef CONFIG_SYS_L2CACHE_OFF
  46 #define CONFIG_SYS_L2_PL310
  47 #define CONFIG_SYS_PL310_BASE   0x10502000
  48 #endif
  49
  50 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  51 #define CONFIG_SYS_TEXT_BASE            0x63300000
  52
  53 /* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */
  54 #define CONFIG_SYS_CLK_FREQ_C210        24000000
  55 #define CONFIG_SYS_CLK_FREQ             CONFIG_SYS_CLK_FREQ_C210
  56
  57 #define CONFIG_SETUP_MEMORY_TAGS
  58 #define CONFIG_CMDLINE_TAG
  59 #define CONFIG_REVISION_TAG
  60 #define CONFIG_CMDLINE_EDITING
  61 #define CONFIG_SKIP_LOWLEVEL_INIT
  62 #define CONFIG_BOARD_EARLY_INIT_F
  63
  64 /* MACH_TYPE_TRATS macro will be removed once added to mach-types */
  65 #define MACH_TYPE_TRATS                 3928
  66 #define CONFIG_MACH_TYPE                MACH_TYPE_TRATS
  67
  68 /* Size of malloc() pool */
  69 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (1 << 20))
  70
  71 /* select serial console configuration */
  72 #define CONFIG_SERIAL_MULTI
  73 #define CONFIG_SERIAL2                  /* use SERIAL 2 */
  74 #define CONFIG_BAUDRATE                 115200
  75
  76 /* MMC */
  77 #define CONFIG_GENERIC_MMC
  78 #define CONFIG_MMC
  79 #define CONFIG_S5P_SDHCI
  80 #define CONFIG_SDHCI
  81
  82 /* PWM */
  83 #define CONFIG_PWM
  84
  85 /* It should define before config_cmd_default.h */
  86 #define CONFIG_SYS_NO_FLASH
  87
  88 /* Command definition */
  89 #include <config_cmd_default.h>
  90
  91 #undef CONFIG_CMD_FPGA
  92 #undef CONFIG_CMD_MISC
  93 #undef CONFIG_CMD_NET
  94 #undef CONFIG_CMD_NFS
  95 #undef CONFIG_CMD_XIMG
  96 #undef CONFIG_CMD_CACHE
  97 #undef CONFIG_CMD_ONENAND
  98 #undef CONFIG_CMD_MTDPARTS
  99 #define CONFIG_CMD_MMC
 100 #define CONFIG_CMD_DFU
 101
 102 /* FAT */
 103 #define CONFIG_CMD_FAT
 104 #define CONFIG_FAT_WRITE
 105
 106 /* USB Composite download gadget - g_dnl */
 107 #define CONFIG_USBDOWNLOAD_GADGET
 108 #define CONFIG_DFU_FUNCTION
 109 #define CONFIG_DFU_MMC
 110
 111 /* USB Samsung's IDs */
 112 #define CONFIG_G_DNL_VENDOR_NUM 0x04E8
 113 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601
 114 #define CONFIG_G_DNL_MANUFACTURER "Samsung"
 115
 116 #define CONFIG_BOOTDELAY                1
 117 #define CONFIG_ZERO_BOOTDELAY_CHECK
 118 #define CONFIG_BOOTARGS                 "Please use defined boot"
 119 #define CONFIG_BOOTCOMMAND              "run mmcboot"
 120
 121 #define CONFIG_DEFAULT_CONSOLE          "console=ttySAC2,115200n8\0"
 122 #define CONFIG_BOOTBLOCK                "10"
 123 #define CONFIG_ENV_COMMON_BOOT          "${console} ${meminfo}"
 124
 125 #define CONFIG_DFU_ALT \
 126         "dfu_alt_info=" \
 127         "u-boot mmc 80 400;" \
 128         "uImage fat 0 2\0" \
 129
 130 #define CONFIG_ENV_OVERWRITE
 131 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 132 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 133
 134 #define CONFIG_EXTRA_ENV_SETTINGS \
 135         "bootk=" \
 136                 "run loaduimage; bootm 0x40007FC0\0" \
 137         "updatemmc=" \
 138                 "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
 139                 "mmc boot 0 1 1 0\0" \
 140         "updatebackup=" \
 141                 "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \
 142                 "mmc boot 0 1 1 0\0" \
 143         "updatebootb=" \
 144                 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
 145         "lpj=lpj=3981312\0" \
 146         "nfsboot=" \
 147                 "set bootargs root=/dev/nfs rw " \
 148                 "nfsroot=${nfsroot},nolock,tcp " \
 149                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
 150                 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
 151                 "; run bootk\0" \
 152         "ramfsboot=" \
 153                 "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \
 154                 "${console} ${meminfo} " \
 155                 "initrd=0x43000000,8M ramdisk=8192\0" \
 156         "mmcboot=" \
 157                 "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
 158                 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
 159                 "run loaduimage; bootm 0x40007FC0\0" \
 160         "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
 161         "boottrace=setenv opts initcall_debug; run bootcmd\0" \
 162         "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
 163         "verify=n\0" \
 164         "rootfstype=ext4\0" \
 165         "console=" CONFIG_DEFAULT_CONSOLE \
 166         "meminfo=crashkernel=32M@0x50000000\0" \
 167         "nfsroot=/nfsroot/arm\0" \
 168         "bootblock=" CONFIG_BOOTBLOCK "\0" \
 169         "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
 170         "mmcdev=0\0" \
 171         "mmcbootpart=2\0" \
 172         "mmcrootpart=3\0" \
 173         "opts=always_resume=1\0" \
 174         CONFIG_DFU_ALT
 175
 176 /* Miscellaneous configurable options */
 177 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 178 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 179 #define CONFIG_SYS_PROMPT               "TRATS # "
 180 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 181 #define CONFIG_SYS_PBSIZE               384     /* Print Buffer Size */
 182 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 183 /* Boot Argument Buffer Size */
 184 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 185 /* memtest works on */
 186 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 187 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x5000000)
 188 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x4800000)
 189
 190 #define CONFIG_SYS_HZ                   1000
 191
 192 /* TRATS has 2 banks of DRAM */
 193 #define CONFIG_NR_DRAM_BANKS    2
 194 #define PHYS_SDRAM_1            CONFIG_SYS_SDRAM_BASE   /* LDDDR2 DMC 0 */
 195 #define PHYS_SDRAM_1_SIZE       (512 << 20)             /* 512 MB in CS 0 */
 196 #define PHYS_SDRAM_2            0x50000000              /* LPDDR2 DMC 1 */
 197 #define PHYS_SDRAM_2_SIZE       (512 << 20)             /* 512 MB in CS 0 */
 198
 199 #define CONFIG_SYS_MEM_TOP_HIDE         (1 << 20)       /* ram console */
 200
 201 #define CONFIG_SYS_MONITOR_BASE         0x00000000
 202 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 203
 204 #define CONFIG_ENV_IS_IN_MMC
 205 #define CONFIG_SYS_MMC_ENV_DEV          0
 206 #define CONFIG_ENV_SIZE                 4096
 207 #define CONFIG_ENV_OFFSET               ((32 - 4) << 10) /* 32KiB - 4KiB */
 208
 209 #define CONFIG_DOS_PARTITION
 210
 211 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
 212 #define CONFIG_SYS_CACHELINE_SIZE       32
 213
 214 #include <asm/arch/gpio.h>
 215 /*
 216  * I2C Settings
 217  */
 218 #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
 219 #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
 220
 221 #define CONFIG_SOFT_I2C
 222 #define CONFIG_SOFT_I2C_READ_REPEATED_START
 223 #define CONFIG_SYS_I2C_SPEED    50000
 224 #define CONFIG_I2C_MULTI_BUS
 225 #define CONFIG_SYS_MAX_I2C_BUS  7
 226
 227 #define CONFIG_PMIC
 228 #define CONFIG_PMIC_I2C
 229 #define CONFIG_PMIC_MAX8997
 230
 231 #define CONFIG_USB_GADGET
 232 #define CONFIG_USB_GADGET_S3C_UDC_OTG
 233 #define CONFIG_USB_GADGET_DUALSPEED
 234 #define CONFIG_USB_GADGET_VBUS_DRAW     2
 235
 236 /* LCD */
 237 #define CONFIG_EXYNOS_FB
 238 #define CONFIG_LCD
 239 #define CONFIG_CMD_BMP
 240 #define CONFIG_BMP_32BPP
 241 #define CONFIG_FB_ADDR          0x52504000
 242 #define CONFIG_S6E8AX0
 243 #define CONFIG_EXYNOS_MIPI_DSIM
 244 #define CONFIG_VIDEO_BMP_GZIP
 245 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12))
 246
 247 #endif  /* __CONFIG_H */