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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright (C) 2013 Samsung Electronics
4 * Sanghee Kim <sh0130.kim@samsung.com>
5 * Piotr Wilczek <p.wilczek@samsung.com>
6 *
7 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
8 */
9
10 #ifndef __CONFIG_TRATS2_H
11 #define __CONFIG_TRATS2_H
12
13 #include <configs/exynos4-common.h>
14
15 #define CONFIG_TIZEN /* TIZEN lib */
16
17 #define CONFIG_SYS_L2CACHE_OFF
18 #ifndef CONFIG_SYS_L2CACHE_OFF
19 #define CONFIG_SYS_L2_PL310
20 #define CONFIG_SYS_PL310_BASE 0x10502000
21 #endif
22
23 /* TRATS2 has 4 banks of DRAM */
24 #define CONFIG_NR_DRAM_BANKS 4
25 #define CONFIG_SYS_SDRAM_BASE 0x40000000
26 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
27 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
28 /* memtest works on */
29 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
30 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
31 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
32
33 /* select serial console configuration */
34 #define CONFIG_SERIAL2
35
36 /* Console configuration */
37
38 #define CONFIG_BOOTCOMMAND "run autoboot"
39 #define CONFIG_DEFAULT_CONSOLE "ttySAC2,115200n8"
40
41 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
42 - GENERATED_GBL_DATA_SIZE)
43
44 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
45
46 #define CONFIG_SYS_MONITOR_BASE 0x00000000
47
48 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
49 #define CONFIG_ENV_SIZE 4096
50 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
51
52 #define CONFIG_ENV_OVERWRITE
53
54 /* Tizen - partitions definitions */
55 #define PARTS_CSA "csa-mmc"
56 #define PARTS_BOOT "boot"
57 #define PARTS_QBOOT "qboot"
58 #define PARTS_CSC "csc"
59 #define PARTS_ROOT "platform"
60 #define PARTS_DATA "data"
61 #define PARTS_UMS "ums"
62
63 #define PARTS_DEFAULT \
64 "uuid_disk=${uuid_gpt_disk};" \
65 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
66 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
67 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
68 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
69 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
70 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
71 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
72
73 #define CONFIG_DFU_ALT \
74 "u-boot raw 0x80 0x800;" \
75 "/uImage ext4 0 2;" \
76 "/modem.bin ext4 0 2;" \
77 "/exynos4412-trats2.dtb ext4 0 2;" \
78 ""PARTS_CSA" part 0 1;" \
79 ""PARTS_BOOT" part 0 2;" \
80 ""PARTS_QBOOT" part 0 3;" \
81 ""PARTS_CSC" part 0 4;" \
82 ""PARTS_ROOT" part 0 5;" \
83 ""PARTS_DATA" part 0 6;" \
84 ""PARTS_UMS" part 0 7;" \
85 "params.bin raw 0x38 0x8;" \
86 "/Image.itb ext4 0 2\0"
87
88 #define CONFIG_EXTRA_ENV_SETTINGS \
89 "bootk=" \
90 "run loaduimage;" \
91 "if run loaddtb; then " \
92 "bootm 0x40007FC0 - ${fdtaddr};" \
93 "fi;" \
94 "bootm 0x40007FC0;\0" \
95 "updatebackup=" \
96 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
97 " mmc dev 0 0\0" \
98 "updatebootb=" \
99 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
100 "mmcboot=" \
101 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
102 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
103 "run bootk\0" \
104 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
105 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
106 "verify=n\0" \
107 "rootfstype=ext4\0" \
108 "console=" CONFIG_DEFAULT_CONSOLE "\0" \
109 "kernelname=uImage\0" \
110 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
111 "${kernelname}\0" \
112 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
113 "${fdtfile}\0" \
114 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
115 "mmcbootpart=2\0" \
116 "mmcrootpart=5\0" \
117 "opts=always_resume=1\0" \
118 "partitions=" PARTS_DEFAULT \
119 "dfu_alt_info=" CONFIG_DFU_ALT \
120 "uartpath=ap\0" \
121 "usbpath=ap\0" \
122 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
123 "consoleoff=set console console=ram; save; reset\0" \
124 "spladdr=0x40000100\0" \
125 "splsize=0x200\0" \
126 "splfile=falcon.bin\0" \
127 "spl_export=" \
128 "setexpr spl_imgsize ${splsize} + 8 ;" \
129 "setenv spl_imgsize 0x${spl_imgsize};" \
130 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
131 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
132 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
133 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
134 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
135 "spl export atags 0x40007FC0;" \
136 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
137 "mw.l ${spl_addr_tmp} ${splsize};" \
138 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
139 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
140 "setenv spl_imgsize;" \
141 "setenv spl_imgaddr;" \
142 "setenv spl_addr_tmp;\0" \
143 CONFIG_EXTRA_ENV_ITB \
144 "fdtaddr=40800000\0" \
145
146 /* GPT */
147
148 /* Security subsystem - enable hw_rand() */
149 #define CONFIG_EXYNOS_ACE_SHA
150
151 /* Common misc for Samsung */
152 #define CONFIG_MISC_COMMON
153
154 #define CONFIG_MISC_INIT_R
155
156 /* Download menu - Samsung common */
157 #define CONFIG_LCD_MENU
158
159 /* Download menu - definitions for check keys */
160 #ifndef __ASSEMBLY__
161
162 #define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
163 #define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
164 #define KEY_PWR_STATUS_MASK (1 << 0)
165 #define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
166 #define KEY_PWR_INTERRUPT_MASK (1 << 1)
167
168 #define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
169 #define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
170 #endif /* __ASSEMBLY__ */
171
172 /* LCD console */
173 #define LCD_BPP LCD_COLOR16
174
175 /* LCD */
176 #define CONFIG_BMP_16BPP
177 #define CONFIG_FB_ADDR 0x52504000
178 #define CONFIG_EXYNOS_MIPI_DSIM
179 #define CONFIG_VIDEO_BMP_GZIP
180 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
181
182 #endif /* __CONFIG_H */