include/configs/ts4800.h

   1 /*
   2  * Copyright (C) 2015, Savoir-faire Linux Inc.
   3  *
   4  * Derived from MX51EVK code by
   5  *   Guennadi Liakhovetski <lg@denx.de>
   6  *   Freescale Semiconductor, Inc.
   7  *
   8  * Configuration settings for the TS4800 Board
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 /* High Level Configuration Options */
  17 #define CONFIG_MX51
  18
  19 #define CONFIG_DISPLAY_CPUINFO
  20 #define CONFIG_DISPLAY_BOARDINFO
  21
  22 #define CONFIG_SYS_NO_FLASH             /* No NOR Flash */
  23 #define CONFIG_SKIP_LOWLEVEL_INIT       /* U-boot is a 2nd stage bootloader */
  24
  25 #define CONFIG_HW_WATCHDOG
  26
  27 #define CONFIG_MACH_TYPE        MACH_TYPE_TS48XX
  28
  29 /* text base address used when linking */
  30 #define CONFIG_SYS_TEXT_BASE    0x90008000
  31
  32 #include <asm/arch/imx-regs.h>
  33
  34 /* enable passing of ATAGs */
  35 #define CONFIG_CMDLINE_TAG
  36 #define CONFIG_SETUP_MEMORY_TAGS
  37 #define CONFIG_INITRD_TAG
  38 #define CONFIG_REVISION_TAG
  39
  40 /* use common/board_f.c instead of arch/<arch>/lib/<board>.c */
  41 #define CONFIG_SYS_GENERIC_BOARD
  42
  43 /*
  44  * Size of malloc() pool
  45  */
  46 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  47
  48 /*
  49  * Hardware drivers
  50  */
  51
  52 #define CONFIG_MXC_UART
  53 #define CONFIG_MXC_UART_BASE    UART1_BASE
  54 #define CONFIG_MXC_GPIO
  55
  56 /*
  57  * SPI Configs
  58  * */
  59 #define CONFIG_HARD_SPI /* puts SPI: ready */
  60 #define CONFIG_MXC_SPI /* driver for the SPI controllers*/
  61 #define CONFIG_CMD_SPI /* SPI serial bus support */
  62
  63 /*
  64  * MMC Configs
  65  * */
  66 #define CONFIG_FSL_ESDHC
  67 #define CONFIG_SYS_FSL_ESDHC_ADDR       MMC_SDHC1_BASE_ADDR
  68
  69 #define CONFIG_MMC
  70
  71 #define CONFIG_CMD_MMC
  72 #define CONFIG_GENERIC_MMC
  73 #define CONFIG_CMD_FAT
  74 #define CONFIG_DOS_PARTITION
  75
  76 /*
  77  * Eth Configs
  78  */
  79 #define CONFIG_MII
  80 #define CONFIG_PHYLIB
  81 #define CONFIG_PHY_SMSC
  82
  83 #define CONFIG_FEC_MXC
  84 #define IMX_FEC_BASE            FEC_BASE_ADDR
  85 #define CONFIG_ETHPRIME         "FEC"
  86 #define CONFIG_FEC_MXC_PHYADDR  0
  87
  88 #define CONFIG_CMD_PING
  89 #define CONFIG_CMD_DHCP
  90 #define CONFIG_CMD_MII
  91
  92 /* allow to overwrite serial and ethaddr */
  93 #define CONFIG_ENV_OVERWRITE            /* disable vendor parameters protection (serial#, ethaddr) */
  94 #define CONFIG_CONS_INDEX               1 /* use UART0 : used by serial driver */
  95 #define CONFIG_BAUDRATE                 115200
  96
  97 /***********************************************************
  98  * Command definition
  99  ***********************************************************/
 100
 101 #define CONFIG_CMD_BOOTZ
 102 #undef CONFIG_CMD_IMLS
 103
 104 /* Environment variables */
 105
 106 #define CONFIG_BOOTDELAY        1
 107
 108 #define CONFIG_LOADADDR         0x91000000      /* loadaddr env var */
 109
 110 #define CONFIG_EXTRA_ENV_SETTINGS \
 111         "script=boot.scr\0" \
 112         "image=uImage\0" \
 113         "mmcdev=0\0" \
 114         "mmcpart=1\0" \
 115         "mmcargs=setenv bootargs root=/dev/mmcblk0p2 rootwait rw\0" \
 116         "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
 117         "loadbootscript=" \
 118                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 119         "bootscript=echo Running bootscript from mmc ...; " \
 120                 "source\0" \
 121         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
 122         "mmcboot=echo Booting from mmc ...; " \
 123                 "run mmcargs addtty; " \
 124                 "bootm; "
 125
 126 #define CONFIG_BOOTCOMMAND \
 127         "mmc dev ${mmcdev}; if mmc rescan; then " \
 128                 "if run loadbootscript; then " \
 129                         "run bootscript; " \
 130                 "else " \
 131                         "if run loadimage; then " \
 132                                 "run mmcboot; " \
 133                         "fi; " \
 134                 "fi; " \
 135         "fi; "
 136
 137 /*
 138  * Miscellaneous configurable options
 139  */
 140 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 141 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 142 #define CONFIG_AUTO_COMPLETE
 143 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 144 /* Print Buffer Size */
 145 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 146 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 147 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
 148
 149 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 150
 151 #define CONFIG_CMDLINE_EDITING
 152
 153 /*-----------------------------------------------------------------------
 154  * Physical Memory Map
 155  */
 156 #define CONFIG_NR_DRAM_BANKS    1
 157 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
 158 #define PHYS_SDRAM_1_SIZE       (256 * 1024 * 1024)
 159
 160 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
 161 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
 162 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
 163
 164 #define CONFIG_BOARD_EARLY_INIT_F
 165
 166 #define CONFIG_SYS_INIT_SP_OFFSET \
 167         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 168 #define CONFIG_SYS_INIT_SP_ADDR \
 169         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 170
 171 /* Low level init */
 172 #define CONFIG_SYS_DDR_CLKSEL   0
 173 #define CONFIG_SYS_CLKTL_CBCDR  0x59E35100
 174 #define CONFIG_SYS_MAIN_PWR_ON
 175
 176 /*-----------------------------------------------------------------------
 177  * Environment organization
 178  */
 179
 180 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
 181 #define CONFIG_ENV_SIZE        (8 * 1024)
 182 #define CONFIG_ENV_IS_IN_MMC
 183 #define CONFIG_SYS_MMC_ENV_DEV 0
 184
 185 #endif