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1 /*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * (C) Copyright 2004
8 * ARM Ltd.
9 * Philippe Robin, <philippe.robin@arm.com>
10 * Configuration for Versatile PB.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31 #ifndef __CONFIG_H
32 #define __CONFIG_H
33
34 /*
35 * High Level Configuration Options
36 * (easy to change)
37 */
38 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
39 #define CONFIG_VERSATILE 1 /* in Versatile Platform Board */
40 #define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */
41
42 #ifndef CONFIG_ARCH_VERSATILE_AB /* AB */
43 #define CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */
44 #endif
45
46 #define CONFIG_SYS_MEMTEST_START 0x100000
47 #define CONFIG_SYS_MEMTEST_END 0x10000000
48 #define CONFIG_SYS_HZ (1000000 / 256)
49 #define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */
50
51 #define CONFIG_SYS_TIMER_INTERVAL 10000
52 #define CONFIG_SYS_TIMER_RELOAD (CONFIG_SYS_TIMER_INTERVAL >> 4)
53 #define CONFIG_SYS_TIMER_CTRL 0x84 /* Enable, Clock / 16 */
54
55 /*
56 * control registers
57 */
58 #define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
59
60 /*
61 * System controller bit assignment
62 */
63 #define VERSATILE_REFCLK 0
64 #define VERSATILE_TIMCLK 1
65
66 #define VERSATILE_TIMER1_EnSel 15
67 #define VERSATILE_TIMER2_EnSel 17
68 #define VERSATILE_TIMER3_EnSel 19
69 #define VERSATILE_TIMER4_EnSel 21
70
71 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
72 #define CONFIG_SETUP_MEMORY_TAGS 1
73 #define CONFIG_MISC_INIT_R 1
74 /*
75 * Size of malloc() pool
76 */
77 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
78 /* size in bytes reserved for initial data */
79 #define CONFIG_SYS_GBL_DATA_SIZE 128
80
81 /*
82 * Hardware drivers
83 */
84
85 #define CONFIG_NET_MULTI
86 #define CONFIG_SMC91111
87 #define CONFIG_SMC_USE_32_BIT
88 #define CONFIG_SMC91111_BASE 0x10010000
89 #undef CONFIG_SMC91111_EXT_PHY
90
91 /*
92 * NS16550 Configuration
93 */
94 #define CONFIG_PL011_SERIAL
95 #define CONFIG_PL011_CLOCK 24000000
96 #define CONFIG_PL01x_PORTS \
97 {(void *)CONFIG_SYS_SERIAL0, \
98 (void *)CONFIG_SYS_SERIAL1 }
99 #define CONFIG_CONS_INDEX 0
100
101 #define CONFIG_BAUDRATE 38400
102 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
103 #define CONFIG_SYS_SERIAL0 0x101F1000
104 #define CONFIG_SYS_SERIAL1 0x101F2000
105
106 /*
107 * Command line configuration.
108 */
109 #define CONFIG_CMD_BDI
110 #define CONFIG_CMD_DHCP
111 #define CONFIG_CMD_FLASH
112 #define CONFIG_CMD_IMI
113 #define CONFIG_CMD_MEMORY
114 #define CONFIG_CMD_NET
115 #define CONFIG_CMD_PING
116 #define CONFIG_CMD_SAVEENV
117
118 /*
119 * BOOTP options
120 */
121 #define CONFIG_BOOTP_BOOTPATH
122 #define CONFIG_BOOTP_GATEWAY
123 #define CONFIG_BOOTP_HOSTNAME
124 #define CONFIG_BOOTP_SUBNETMASK
125
126 #define CONFIG_BOOTDELAY 2
127 #define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\
128 "netdev=25,0,0xf1010000,0xf1010010,eth0"
129
130 /*
131 * Static configuration when assigning fixed address
132 */
133 #define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */
134
135 /*
136 * Miscellaneous configurable options
137 */
138 #define CONFIG_SYS_LONGHELP /* undef to save memory */
139 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
140 /* Monitor Command Prompt */
141 #ifdef CONFIG_ARCH_VERSATILE_AB
142 # define CONFIG_SYS_PROMPT "VersatileAB # "
143 #else
144 # define CONFIG_SYS_PROMPT "VersatilePB # "
145 #endif
146 /* Print Buffer Size */
147 #define CONFIG_SYS_PBSIZE \
148 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
149 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
150 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
151
152 #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
153
154 /*-----------------------------------------------------------------------
155 * Stack sizes
156 *
157 * The stack sizes are set up in start.S using the settings below
158 */
159 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
160 #ifdef CONFIG_USE_IRQ
161 #define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */
162 #define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */
163 #endif
164
165 /*-----------------------------------------------------------------------
166 * Physical Memory Map
167 */
168 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
169 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
170 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
171 #define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
172
173 /*-----------------------------------------------------------------------
174 * FLASH and environment organization
175 */
176 /*
177 * Use the CFI flash driver for ease of use
178 */
179 #define CONFIG_SYS_FLASH_CFI
180 #define CONFIG_FLASH_CFI_DRIVER
181 #define CONFIG_ENV_IS_IN_FLASH 1
182 /*
183 * System control register
184 */
185 #define VERSATILE_SYS_BASE 0x10000000
186 #define VERSATILE_SYS_FLASH_OFFSET 0x4C
187 #define VERSATILE_FLASHCTRL \
188 (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
189 /* Enable writing to flash */
190 #define VERSATILE_FLASHPROG_FLVPPEN (1 << 0)
191
192 /* timeout values are in ticks */
193 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
194 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
195
196 /*
197 * Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block
198 * i.e.
199 * the bottom "sector" (bottom boot), or top "sector"
200 * (top boot), is a seperate erase region divided into
201 * 4 (equal) smaller sectors. This, notionally, allows
202 * quicker erase/rewrire of the most frequently changed
203 * area......
204 * CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4
205 */
206
207 #ifdef CONFIG_ARCH_VERSATILE_AB
208 #define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */
209 #define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE)
210 #define CONFIG_SYS_MAX_FLASH_SECT (520)
211 #endif
212
213 #ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */
214 #define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
215 #define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE
216 #define CONFIG_SYS_MAX_FLASH_SECT (260)
217 #endif
218
219 #define CONFIG_SYS_FLASH_BASE 0x34000000
220 #define CONFIG_SYS_MAX_FLASH_BANKS 1
221
222 #define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE)
223
224 /* The ARM Boot Monitor is shipped in the lowest sector of flash */
225
226 #define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE)
227 #define CONFIG_ENV_SIZE 8192
228 #define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE)
229 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
230 #define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN)
231
232 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
233 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
234
235 #endif /* __CONFIG_H */